Implementation of True Random Number Generator based on Double-Scroll Attractor circuit with GST memristor emulator

TL;DR

This paper presents a novel true random number generator design utilizing a double-scroll attractor circuit with a GST memristor emulator, demonstrating chaotic behavior and randomness suitable for cryptographic security.

Contribution

It introduces a new TRBG model based on chaotic circuits with GST memristors, combining chaos theory with memristor technology for enhanced randomness.

Findings

Chaotic behavior confirmed through simulation of voltage and current.

Close to double-scroll attractor form observed.

Randomness validated using FFT and Lyapunov exponents.

Abstract

The cryptographic security provided by various techniques of random number generator (RNG) construction is one of the developing researches areas today. Among various types of RNG, the true random bit generator (TRBG) can be considered as the most unpredictable and most secured because its randomness seed is generated from chaotic sources. This paper proposes a design of TRBG model based on double-scroll attractors circuits with GST memristor. After implementation and simulation of the chaotic circuit with GST memristor emulator, the chaotic behavior of the output voltage and inductor current were received. Moreover, their dependence on the input voltage revealed the close to double-scroll form. The randomness generated from the proposed circuit was tested by receiving Fast Fourier Transform (FFT) and Lyapunov exponents of the output voltage.