From Stochastic to Bit Stream Computing: Accurate Implementation of Arithmetic Circuits and Applications in Neural Networks

TL;DR

This paper introduces Bit Stream Computing, a new paradigm that combines the area efficiency of stochastic logic with the accuracy of binary logic, enabling smaller and precise arithmetic circuits for neural networks.

Contribution

It proposes a novel computing paradigm that uses deterministic or stochastic streams, offering accurate arithmetic circuits with area advantages, validated through simulations and neural network applications.

Findings

Proposed circuits outperform previous designs in area and accuracy.

Simulations demonstrate practical potential in CMOS technology.

Applications in neural networks show improved efficiency.

Abstract

In this study, we propose a novel computing paradigm "Bit Stream Computing" that is constructed on the logic used in stochastic computing, but does not necessarily employ randomly or Binomially distributed bit streams as stochastic computing does. Any type of streams can be used either stochastic or deterministic. The proposed paradigm benefits from the area advantage of stochastic logic and the accuracy advantage of conventional binary logic. We implement accurate arithmetic multiplier and adder circuits, classified as asynchronous or synchronous; we also consider their suitability of processing successive streams. The proposed circuits are simulated both in gate level and in transistor level with AMS 0.35um CMOS technology to show the circuits' potential for practical use. We thoroughly compare the proposed adders and multipliers with their predecessors in the literature, individually and in a neural network application. Comparisons made in terms of area and accuracy clearly favor the proposed designs. We believe that this study opens up new horizons for computing that enables us to implement much smaller yet accurate arithmetic circuits compared to the conventional binary and stochastic ones.