Negative Capacitance as Digital and Analog Performance Booster for Complementary MOS Transistors

TL;DR

This paper demonstrates that integrating ferroelectric negative capacitance in 28nm CMOS transistors significantly improves digital and analog performance metrics, including subthreshold swing and current efficiency, enabling lower power operation.

Contribution

It presents a novel application of PZT ferroelectric capacitors to enhance both n- and p-type MOSFETs in commercial CMOS technology, achieving sub-thermal swings and higher efficiency.

Findings

Subthreshold swing reduced to 10 mV/decade.

Current efficiency factor increased up to 10^5 V^-1.

Supply voltage reduced by 50%."

Abstract

Boltzmann tyranny poses a fundamental limit to lowering the energy dissipation of conventional MOS devices, a minimum increase of the gate voltage, i.e. 60 mV, is required for a 10-fold increase in drain-to-source current at 300 K. Negative Capacitance (NC) in ferroelectric materials is proposed in order to address this physical limitation of CMOS technology. A polarization destabilization in ferroelectrics causes an effective negative permittivity, resulting in a differential voltage amplification and a reduced subthreshold swing when integrated into the gate stack of a transistor. Recent demonstrations of negative capacitance concerned mainly n-type MOSFETs and their subthreshold slope. An effective technology booster should be capable of improving the performance of both n- and p-type transistors. In this work, we report a significant enhancement in both digital (subthreshold swing, on-current over off-current ratio, and overdrive) and analog (transconductance and current efficiency factor) FoM of commercial 28nm CMOS process by exploiting a PZT capacitor as the negative capacitance booster. Accordingly, a sub-thermal swing down to 10 mV/decade together with an enhanced current efficiency factor up to 10$^5$ V$^{-1}$ is obtained in both n- and p-type MOSFETs at room temperature. The overdrive voltage is enhanced up to 0.45 V, leading to a supply voltage reduction of 50\%.