Early Experience on Using Knights Landing Processors for Lattice Boltzmann Applications
Enrico Calore, Alessandro Gabbana, Sebastiano Fabio Schifano, Raffaele, Tripiccione

TL;DR
This paper evaluates the performance of Intel's Knights Landing processors for Lattice Boltzmann fluid dynamics simulations, highlighting how memory layouts and parallel features influence efficiency and energy consumption.
Contribution
It provides early insights into optimizing Lattice Boltzmann applications on KNL processors, including memory layout strategies and performance comparisons.
Findings
High peak performance achievable with proper parallelization.
Memory layout significantly impacts energy efficiency.
KNL outperforms some accelerators in specific configurations.
Abstract
The Knights Landing (KNL) is the codename for the latest generation of Intel processors based on Intel Many Integrated Core (MIC) architecture. It relies on massive thread and data parallelism, and fast on-chip memory. This processor operates in standalone mode, booting an off-the-shelf Linux operating system. The KNL peak performance is very high - approximately 3 Tflops in double precision and 6 Tflops in single precision - but sustained performance depends critically on how well all parallel features of the processor are exploited by real-life applications. We assess the performance of this processor for Lattice Boltzmann codes, widely used in computational fluid-dynamics. In our OpenMP code we consider several memory data-layouts that meet the conflicting computing requirements of distinct parts of the application, and sustain a large fraction of peak performance. We make some…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
