Automation of Processor Verification Using Recurrent Neural Networks
Martin Fajcik, Marcela Zachariasova, Pavel Smrz

TL;DR
This paper introduces a novel method that uses recurrent neural networks to dynamically adjust pseudorandom stimuli generation, significantly improving processor verification coverage and efficiency.
Contribution
The paper presents a new technique integrating RNNs with coverage feedback to enhance simulation-based processor verification processes.
Findings
Coverage closure achieved faster
Small high-coverage stimulus set isolated
Applicable to various processor types
Abstract
When considering simulation-based verification of processors, the current trend is to generate stimuli using pseudorandom generators (PRGs), apply them to the processor inputs and monitor the achieved coverage of its functionality in order to determine verification completeness. Stimuli can have different forms, for example, they can be represented by bit vectors applied to the input ports of the processor or by programs that are loaded directly into the program memory. In this paper, we propose a new technique dynamically altering constraints for PRG via recurrent neural network, which receives a coverage feedback from the simulation of design under verification. For the demonstration purposes we used processors provided by Codasip as their coverage state space is reasonably big and differs for various kinds of processors. Nevertheless, techniques presented in this paper are widely…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
