Segmented Successive Cancellation List Polar Decoding with Tailored CRC

TL;DR

This paper introduces a tailored CRC-aided SCL decoding method for polar codes that balances performance and complexity, incorporating virtual transforms and HARQ, with FPGA implementation demonstrating practical advantages.

Contribution

The paper proposes TCA-SCL decoding with a novel CRC selection method and hybrid ARQ integration, improving performance without increasing complexity significantly.

Findings

TCA-SCL achieves 0.1 dB performance gain over state-of-the-art.

HARQ-TCA-SCL improves performance by 0.25 dB at FER=10^{-2}.

FPGA implementation confirms practical efficiency.

Abstract

As the first error correction codes provably achieving the symmetric capacity of binary-input discrete memory-less channels (B-DMCs), polar codes have been recently chosen by 3GPP for eMBB control channel. Among existing algorithms, CRC-aided successive cancellation list (CA-SCL) decoding is favorable due to its good performance, where CRC is placed at the end of the decoding and helps to eliminate the invalid candidates before final selection. However, the good performance is obtained with a complexity increase that is linear in list size $L$. In this paper, the tailored CRC-aided SCL (TCA-SCL) decoding is proposed to balance performance and complexity. Analysis on how to choose the proper CRC for a given segment is proposed with the help of \emph{virtual transform} and \emph{virtual length}. For further performance improvement, hybrid automatic repeat request (HARQ) scheme is incorporated. Numerical results have shown that, with the similar complexity as the state-of-the-art, the proposed TCA-SCL and HARQ-TCA-SCL schemes achieve $0.1$ dB and $0.25$ dB performance gain at frame error rate $\textrm{FER}=10^{-2}$, respectively. Finally, an efficient TCA-SCL decoder is implemented with FPGA demonstrating its advantages over CA-SCL decoder.