FPGA Implementation of ECG feature extraction using Time domain analysis

TL;DR

This paper presents a FPGA-based system for ECG feature extraction using time domain analysis, enabling real-time arrhythmia detection with high accuracy and efficiency.

Contribution

It introduces a hardware implementation of ECG feature extraction using the Pan-Tompkins algorithm on a Virtex-6 FPGA, demonstrating improved speed and accuracy.

Findings

Successful FPGA implementation of ECG feature extraction

Achieved real-time arrhythmia detection capabilities

Demonstrated efficiency through parallel processing

Abstract

An electrocardiogram (ECG) feature extraction system has been developed and evaluated using Virtex-6 FPGA kit which belongs to Xilinx Ltd. In time domain, Pan-Tompkins algorithm is used for QRS detection and it is followed by a feature extractor block to extract ECG features. This whole system can be used to detect cardiac arrhythmia. The completed algorithm was implemented on Virtex-6(XC6VLX240-T) device and tested using hardware co-simulation in Modelsim and simulink environment. The software generated ECG signals are obtained from MIT-BIH arrhythmia Database [1]. The memory and time complexities of the implemented design were recorded and feature extraction has been done. We have achieved satisfactory results which is mainly due to parallel implementation. Therefore accurate arrhythmia detection using hardware implementation a viable approach.