PCOT: Cache Oblivious Tiling of Polyhedral Programs
Waruna Ranasinghe, Nirmal Prajapati, Tomofumi Yuki, Sanjay, Rajopadhye

TL;DR
This paper compares iteration space tiling and cache-oblivious methods for polyhedral programs, providing empirical insights into when each approach is most effective on modern architectures.
Contribution
It introduces a generalized cache-oblivious code generator for polyhedral programs and empirically evaluates the conditions favoring cache-oblivious tiling over iteration space tiling.
Findings
Cache-oblivious tiling reduces off-chip memory accesses and energy consumption.
Effectiveness of cache-oblivious methods varies depending on kernel characteristics.
The study guides choosing tiling strategies based on architecture and performance goals.
Abstract
This paper studies two variants of tiling: iteration space tiling (or loop blocking) and cache-oblivious methods that recursively split the iteration space with divide-and-conquer. The key question to answer is when we should be using one over the other. The answer to this question is complicated for modern architecture due to a number of reasons. In this paper, we present a detailed empirical study to answer this question for a range of kernels that fit the polyhedral model. Our study is based on a generalized cache oblivious code generator that support this class, which is a superset of those supported by existing tools. The conclusion is that cache oblivious code is most useful when the aim is to have reduced off-chip memory accesses, e.g., lower energy, albeit certain situations that diminish its effectiveness exist.
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Interconnection Networks and Systems · Advanced Data Storage Technologies
