Encrypt Flip-Flop: A Novel Logic Encryption Technique For Sequential Circuits
Rajit Karmakar, Santanu Chatopadhyay, Rohit Kapur

TL;DR
This paper introduces Encrypt Flip-Flop, a new logic encryption method for sequential circuits that effectively resists SAT and scan-based attacks while maintaining low overhead and providing sufficient output corruption.
Contribution
The paper presents Encrypt Flip-Flop, a novel flip-flop output encryption technique that counters all known attacks with minimal design overhead.
Findings
Resists SAT and scan-based attacks effectively
Maintains low design overhead and implementation complexity
Produces significant output corruption with incorrect keys
Abstract
Logic Encryption is one of the most popular hardware security techniques which can prevent IP piracy and illegal IC overproduction. It introduces obfuscation by inserting some extra hardware into a design to hide its functionality from unauthorized users. Correct functionality of an encrypted design depends upon the application of correct keys, shared only with the authorized users. In the recent past, extensive efforts have been devoted in extracting the secret key of an encrypted design. At the same time, several countermeasures have also been proposed by the research community to thwart different state-of-the-art attacks on logic encryption. However, most of the proposed countermeasures fail to prevent the powerful SAT attack. Although a few researchers have proposed different solutions to withstand SAT attack, those solutions suffer from several drawbacks such as high design…
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Taxonomy
TopicsPhysical Unclonable Functions (PUFs) and Hardware Security · Integrated Circuits and Semiconductor Failure Analysis · Cryptographic Implementations and Security
