Charge collection properties of irradiated depleted CMOS pixel test structures
I. Mandi\'c, V. Cindro, A. Gori\v{s}ek, B. Hiti, G. Kramberger, M., Zavrtanik, M. Miku\v{z}, T. Hemperek

TL;DR
This study investigates the charge collection efficiency of irradiated depleted CMOS pixel structures, demonstrating their potential for use in high-radiation environments like the HL-LHC, even after significant neutron irradiation.
Contribution
It provides new data on the radiation tolerance of depleted CMOS sensors, especially comparing thinned and unthinned devices with different backplane processing.
Findings
Depleted depth decreases with neutron fluence but remains >70 μm at 250 V after high irradiation.
Thinned detectors with backplane processing collect significantly more charge post-irradiation.
Collected charge over 5000 electrons is maintained after irradiation to 2×10^15 n_eq/cm^2.
Abstract
Edge-TCT and charge collection measurements with passive test structures made in LFoundry 150 nm CMOS process on p-type substrate with initial resistivity of over 3 kcm are presented. Measurements were made before and after irradiation with reactor neutrons up to 210 n/cm. Two sets of devices were investigated: unthinned (700 m) with substrate biased through the implant on top and thinned (200 m) with processed and metallised back plane. Depleted depth was estimated with Edge-TCT and collected charge was measured with Sr source using an external amplifier with 25 ns shaping time. Depleted depth at given bias voltage decreased with increasing neutron fluence but it was still larger than 70 m at 250 V after the highest fluence. After irradiation much higher collected charge was measured with thinned detectors with processed…
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