Spiking memristor logic gates are a type of time-variant perceptron

TL;DR

This paper models memristor-based logic gates as a novel type of perceptron that is sensitive to input order, demonstrating their high functionality and potential for hardware neural networks.

Contribution

It introduces a new perceptron model for memristor gates that accounts for their time-variant, order-sensitive behavior, advancing neuromorphic computing.

Findings

Memristor gates can perform AND and OR operations simultaneously.

Memristor memory alters input weights, requiring a time-varying perceptron model.

Potential for memristor gates to be used in hardware neural network chips.

Abstract

Memristors are low-power memory-holding resistors thought to be useful for neuromophic computing, which can compute via spike-interactions mediated through the device's short-term memory. Using interacting spikes, it is possible to build an AND gate that computes OR at the same time, similarly a full adder can be built that computes the arithmetical sum of its inputs. Here we show how these gates can be understood by modelling the memristors as a novel type of perceptron: one which is sensitive to input order. The memristor's memory can change the input weights for later inputs, and thus the memristor gates cannot be accurately described by a single perceptron, requiring either a network of time-invarient perceptrons or a complex time-varying self-reprogrammable perceptron. This work demonstrates the high functionality of memristor logic gates, and also that the addition of theasholding could enable the creation of a standard perceptron in hardware, which may have use in building neural net chips.