Implementing Bayesian Networks with Embedded Stochastic MRAM

TL;DR

This paper demonstrates how to implement Bayesian networks using magnetic tunnel junction-based stochastic p-bits, enabling electrical emulation of probabilistic models with real-world variable correlations.

Contribution

It introduces a method to translate Bayesian networks into electronic circuits using probabilistic spin logic and p-bits, bridging probabilistic modeling and hardware implementation.

Findings

Circuit-based Bayesian network emulation matches theoretical correlations.

The approach enables real-world variable correlation measurement via electrical circuits.

Benchmark example with genetic relatedness shows accurate results.

Abstract

Magnetic tunnel junctions (MTJ's) with low barrier magnets have been used to implement random number generators (RNG's) and it has recently been shown that such an MTJ connected to the drain of a conventional transistor provides a three-terminal tunable RNG or a $p$-bit. In this letter we show how this $p$-bit can be used to build a $p$-circuit that emulates a Bayesian network (BN), such that the correlations in real world variables can be obtained from electrical measurements on the corresponding circuit nodes. The $p$-circuit design proceeds in two steps: the BN is first translated into a behavioral model, called Probabilistic Spin Logic (PSL), defined by dimensionless biasing (h) and interconnection (J) coefficients, which are then translated into electronic circuit elements. As a benchmark example, we mimic a family tree of three generations and show that the genetic relatedness calculated from a SPICE-compatible circuit simulator matches well-known results.