A Survey of FPGA-Based Neural Network Accelerator

TL;DR

This survey reviews FPGA-based neural network accelerators, highlighting design techniques and analyzing their potential to surpass GPUs in speed and energy efficiency for neural network inference.

Contribution

It provides a comprehensive overview of existing FPGA-based neural network accelerators and analyzes design techniques from software to hardware levels.

Findings

FPGA accelerators can potentially outperform GPUs in energy efficiency.

Various optimization techniques are used at circuit and system levels.

The survey guides future research directions in FPGA-based neural network acceleration.

Abstract

Recent researches on neural network have shown significant advantage in machine learning over traditional algorithms based on handcrafted features and models. Neural network is now widely adopted in regions like image, speech and video recognition. But the high computation and storage complexity of neural network inference poses great difficulty on its application. CPU platforms are hard to offer enough computation capacity. GPU platforms are the first choice for neural network process because of its high computation capacity and easy to use development frameworks. On the other hand, FPGA-based neural network inference accelerator is becoming a research topic. With specifically designed hardware, FPGA is the next possible solution to surpass GPU in speed and energy efficiency. Various FPGA-based accelerator designs have been proposed with software and hardware optimization techniques to achieve high speed and energy efficiency. In this paper, we give an overview of previous work on neural network inference accelerators based on FPGA and summarize the main techniques used. An investigation from software to hardware, from circuit level to system level is carried out to complete analysis of FPGA-based neural network inference accelerator design and serves as a guide to future work.