Chip-Level Electromigration Reliability Evaluation with Multiple On-Die Variation Effects
Karthik Airani, Rohit Guttal

TL;DR
This paper introduces a variation-aware electromigration analysis tool for power grid wires that considers process variations like CMP and EPE, using an atomic concentration balance-based simulation model.
Contribution
It presents a novel EM reliability evaluation method incorporating process variations with a compact simulation model for chip-level analysis.
Findings
The tool effectively predicts EM failure risks under process variations.
Variation effects significantly impact EM lifetime estimations.
The approach improves reliability assessment accuracy for power grid wires.
Abstract
In this paper, we briefly introduce physical foundations of electromigration (EM) and present a few classical EMrelated theories. We discuss physical parameters affecting EM wire lifetime and we introduce some background related to the existing EM physical simulators. In our work, for EM physical simulation we adopt the atomic concentration balance-based model. We discuss the simulation setup and results. We present a variation-aware electromigration (EM) analysis tool for power grid wires. The tool considers process variations caused by the chemical-mechanical polishing (CMP) and edge placement error (EPE). It uses a compact model that features critical region extraction and variation coefficient calculation.
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Taxonomy
TopicsCopper Interconnects and Reliability · Electronic Packaging and Soldering Technologies · Semiconductor materials and devices
