Analytical determination of participation in superconducting coplanar architectures

TL;DR

This paper presents an analytical method using conformal mapping to calculate participation ratios of loss-inducing interfaces in superconducting coplanar architectures, validated against numerical solutions and applied to transmon qubit design.

Contribution

It introduces an analytical two-dimensional approximation for participation calculation in coplanar superconducting devices, simplifying the analysis of surface losses.

Findings

Analytical expressions match finite element results at large distances.

Near edges, electric field divergence causes discrepancies with numerical methods.

Shallow depth electric field energy approximations closely match conformal mapping and literature results.

Abstract

Superconducting qubits are sensitive to a variety of loss mechanisms which include dielectric loss from interfaces. The calculation of participation near the key interfaces of planar designs can be accomplished through an analytical description of the electric field density based on conformal mapping. In this way, a two-dimensional approximation to coplanar waveguide and capacitor designs produces values of the participation as a function of depth from the top metallization layer as well as the volume participation within a given thickness from this surface by reducing the problem to a surface integration over the region of interest. These quantities are compared to finite element method numerical solutions, which validate the values at large distances from the coplanar metallization but diverge near the edges of the metallization features due to the singular nature of the electric fields. A simple approximation to the electric field energy at shallow depths (relative to the waveguide width) is also presented that closely replicates the numerical results based on conformal mapping and those reported in prior literature. These techniques are applied to the calculation of surface participation within a transmon qubit design, where the effects due to shunting capacitors can be easily integrated with those associated with metallization comprising the local environment of the qubit junction.