Beyond-CMOS Device Benchmarking for Boolean and Non-Boolean Logic Applications
Chenyun Pan, Azad Naeemi

TL;DR
This paper benchmarks various beyond-CMOS charge- and spin-based devices, extending methodologies to interconnect and non-Boolean logic, revealing potential advantages of spintronic devices in non-Boolean applications.
Contribution
It introduces new benchmarking methods for beyond-CMOS devices, including non-Boolean logic, and compares device performance with a focus on interconnect and neural network applications.
Findings
Spintronic devices can outperform CMOS in non-Boolean logic.
Deep pipelining boosts throughput of low-power devices.
Extended benchmarking includes interconnect-centric and neural network applications.
Abstract
The latest results of benchmarking research are presented for a variety of beyond-CMOS charge- and spin-based devices. In addition to improving the device-level models, several new device proposals and a few majorly modified devices are investigated. Deep pipelining circuits are employed to boost the throughput of low-power devices. Furthermore, the benchmarking methodology is extended to interconnect-centric analyses and non-Boolean logic applications. In contrast to Boolean circuits, non-Boolean circuits based on the cellular neural network demonstrate that spintronic devices can potentially outperform conventional CMOS devices.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsAdvancements in Semiconductor Devices and Circuit Design · Semiconductor materials and devices · Advanced Memory and Neural Computing
