Depth First Always On Routing Trace Algorithm
Anthony Kim, Sung Hyun Chen, Chen Zheng

TL;DR
This paper introduces a new depth-first routing trace algorithm for EDA tools that efficiently detects potential hotspot issues early in the design process by estimating voltage drops, improving design reliability.
Contribution
The paper presents a novel depth-first always-on routing trace algorithm that enhances early detection of routing issues in EDA tools, reducing design effort.
Findings
Efficiently identifies potential hotspot issues early.
Accurately estimates routing quality using approximate voltage drop.
Reduces overall design effort by early issue detection.
Abstract
In this paper, we discussed current limitation in the electronic-design-automotation (EDA) tool on tracing the always on routing. We developed an algorithm to efficiently track the secondary power routing and accurately estimate the routing quality using approximate voltage drop as the criteria. The fast check can identify potential hotspot issues without going through sign-off checks. It helps designers to capture issues at early stages and fix the issues with less design effort. We also discussed some limitations to our algorithm.
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Taxonomy
TopicsCopper Interconnects and Reliability · VLSI and FPGA Design Techniques · VLSI and Analog Circuit Testing
