The Tersoff many-body potential: Sustainable performance through vectorization

TL;DR

This paper presents optimized vectorized implementations of the Tersoff many-body potential for molecular dynamics simulations, significantly improving performance across various CPU and accelerator architectures, especially on Intel Xeon Phi.

Contribution

The authors develop an architecture-agnostic, explicitly vectorized implementation of the Tersoff potential, enhancing performance in molecular dynamics simulations on multiple platforms.

Findings

Optimized vectorization improves performance on CPUs and accelerators.

Intel Xeon Phi benefits most, outperforming CPUs after optimization.

Explicit vectorization is necessary due to compiler limitations.

Abstract

Molecular dynamics models materials by simulating each individual particle's trajectory. Many-body potentials lead to a more accurate trajectory simulation, and are used in materials science and computational chemistry. We present optimization results for one multi-body potential on a range of vector instruction sets, targeting both CPUs and accelerators like the Intel Xeon Phi. Parallelization of MD simulations is well-studied; by contrast, vectorization is relatively unexplored. Given the prevalence and power of modern vector units, exploiting them is imperative for high performance software. When running on a highly parallel machine, any improvement to the scalar performance is paid back in hundreds or thousands of saved core hours. Vectorization is already commonly used in the optimization or pair potentials; multi-body potentials pose new, unique challenges. Indeed, their optimization pushes the boundaries of current compilers, forcing us to use explicit vectorization techniques for now. In this study, we add an optimized implementation of Tersoff potential to the LAMMPS molecular dynamics simulation package. To reduce the burden of explicit vectorization, we abstract from the specific vector instruction set and desired precision: From one algorithm, we get optimized implementations for many platforms, from SSE4.2 to AVX512, and the Intel Xeon Phi. We compare the kernels across different architectures, and determine suitable architecture-dependent parameters. Our optimizations benefit any architecture, but have a disproportionate effect on the Intel Xeon Phi, which beats the CPU (2xE5-2650) after optimization.