Image Acquisition System Using On Sensor Compressed Sampling Technique

TL;DR

This paper introduces a novel image sensor pixel design enabling on-sensor compressed sampling, significantly reducing data, power consumption, and complexity, thereby enhancing high-resolution imaging capabilities.

Contribution

A new pixel design methodology that facilitates implementing compressed sensing directly at the sensor level, improving energy efficiency and reducing hardware complexity.

Findings

Reduces power consumption by 23%-65%.

Cuts raw data rate and transistor count per pixel.

Simplifies ADC, JPEG encoder, and wiring design.

Abstract

Advances in CMOS technology have made high resolution image sensors possible. These image sensor pose significant challenges in terms of the amount of raw data generated, energy efficiency and frame rate. This paper presents a new design methodology for an imaging system and a simplified novel image sensor pixel design to be used in such system so that Compressed Sensing (CS) technique can be implemented easily at the sensor level. This results in significant energy savings as it not only cuts the raw data rate but also reduces transistor count per pixel, decreases pixel size, increases fill factor, simplifies ADC, JPEG encoder and JPEG decoder design and decreases wiring as well as address decoder size by half. Thus CS has the potential to increase the resolution of image sensors for a given technology and die size while significantly decreasing the power consumption and design complexity. We show that it has potential to reduce power consumption by about 23%-65%.