On Error-Correction Performance and Implementation of Polar Code List Decoders for 5G

TL;DR

This paper evaluates polar code list decoders for 5G, comparing their error-correction performance, implementation complexity, and energy efficiency against LDPC codes, highlighting the advantages of specific SCL variants.

Contribution

It provides a comprehensive comparison of SCL-based polar decoders with LDPC decoders in terms of performance, area, power, and energy for short code lengths in 5G.

Findings

Partitioned SCL (PSCL) has the lowest area and power consumption.

Fast-SSCL achieves the lowest energy consumption.

SCL decoders occupy significantly less area and energy than LDPC decoders.

Abstract

Polar codes are a class of capacity achieving error correcting codes that has been recently selected for the next generation of wireless communication standards (5G). Polar code decoding algorithms have evolved in various directions, striking different balances between error-correction performance, speed and complexity. Successive-cancellation list (SCL) and its incarnations constitute a powerful, well-studied set of algorithms, in constant improvement. At the same time, different implementation approaches provide a wide range of area occupations and latency results. 5G puts a focus on improved error-correction performance, high throughput and low power consumption: a comprehensive study considering all these metrics is currently lacking in literature. In this work, we evaluate SCL-based decoding algorithms in terms of error-correction performance and compare them to low-density parity-check (LDPC) codes. Moreover, we consider various decoder implementations, for both polar and LDPC codes, and compare their area occupation and power and energy consumption when targeting short code lengths and rates. Our work shows that among SCL-based decoders, the partitioned SCL (PSCL) provides the lowest area occupation and power consumption, whereas fast simplified SCL (Fast-SSCL) yields the lowest energy consumption. Compared to LDPC decoder architectures, different SCL implementations occupy up to 17.1x less area, dissipate up to 7.35x less power, and up to 26x less energy.