Development of a time-to-digital converter ASIC for the upgrade of the ATLAS Monitored Drift Tube detector
Jinhong Wang, Yu Liang, Xiong Xiao, Qi An, John W.Chapman, Tiesheng, Dai, Bing Zhou, Junjie Zhu, Lei Zhao

TL;DR
This paper presents a new time-to-digital converter ASIC designed to upgrade the ATLAS Muon Spectrometer's detector system, improving timing precision and power efficiency for high-luminosity conditions.
Contribution
The paper introduces a novel TDC ASIC prototype fabricated in 130 nm CMOS technology, optimized for the ATLAS MDT detector upgrade.
Findings
Timing bin variation of 40 ps across 48 channels
Power consumption of approximately 6.5 mW per channel
Design meets the specified timing and power requirements
Abstract
The upgrade of the ATLAS muon spectrometer for high-luminosity LHC requires new trigger and readout electronics for the various elements of the detector. We present the design of a time-to-digital converter (TDC) ASIC prototype for the ATLAS Monitored Drift Tube (MDT) detector. The chip was fabricated in a GlobalFoundries 130 nm CMOS technology. Studies indicate that its timing and power consumption characteristics meet the design specifications, with a timing bin variation of 40 ps for all 48 channels with a power consumption of about 6.5 mW per channel.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
