Energy-dissipation Limits in Variance-based Computing

TL;DR

This paper demonstrates that variance-based logic (VBL) can theoretically surpass traditional bi-stable logic in energy efficiency at thermal noise limits, achieving lower energy dissipation per bit.

Contribution

It provides a theoretical analysis showing VBL's potential to operate below the fundamental energy dissipation limits of bi-stable logic.

Findings

VBL can achieve sub-KT/bit energy dissipation limits.

Bi-stable logic has a lower limit of 4.35KT/bit.

Results are applicable to various VBL implementations.

Abstract

Variance-based logic (VBL) uses the fluctuations or the variance in the state of a particle or a physical quantity to represent different logic levels. In this letter we show that compared to the traditional bi-stable logic representation the variance-based representation can theoretically achieve a superior performance trade-off (in terms of energy dissipation and information capacity) when operating at fundamental limits imposed by thermal-noise. We show that for a bi-stable logic device the lower limit on energy dissipated per bit is 4.35KT/bit, whereas under similar operating conditions, a VBL device could achieve a lower limit of sub-KT/bit. These theoretical results are general enough to be applicable to different instantiations and variants of VBL ranging from digital processors based on energy-scavenging or to processors based on the emerging valleytronic devices.