Hardware-efficient on-line learning through pipelined truncated-error backpropagation in binary-state networks
Hesham Mostafa, Bruno Pedroni, Sadique Sheik, Gert Cauwenberghs

TL;DR
This paper introduces a hardware-efficient, pipelined on-line learning method for binary-state neural networks that reduces computation and memory needs, enabling practical deep network training on FPGA hardware.
Contribution
It presents a novel pipelined backpropagation approach using binary states and ternary errors, eliminating multiplications and reducing memory for efficient FPGA implementation.
Findings
Successful on-line MNIST learning with minimal performance degradation
Significant reduction in multiplications and memory usage
Demonstrated feasibility of deep network training on FPGA
Abstract
Artificial neural networks (ANNs) trained using backpropagation are powerful learning architectures that have achieved state-of-the-art performance in various benchmarks. Significant effort has been devoted to developing custom silicon devices to accelerate inference in ANNs. Accelerating the training phase, however, has attracted relatively little attention. In this paper, we describe a hardware-efficient on-line learning technique for feedforward multi-layer ANNs that is based on pipelined backpropagation. Learning is performed in parallel with inference in the forward pass, removing the need for an explicit backward pass and requiring no extra weight lookup. By using binary state variables in the feedforward network and ternary errors in truncated-error backpropagation, the need for any multiplications in the forward and backward passes is removed, and memory requirements for the…
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Taxonomy
MethodsDense Connections · Feedforward Network
