# Side-wall spacer passivated sub-um Josephson junction fabrication process

## TL;DR

This paper introduces a novel fabrication process for sub-micrometer Josephson junctions using a side-wall-passivating spacer structure, enabling precise, scalable, and low-loss superconducting devices for quantum applications.

## Contribution

The paper presents a new SWAPS-based fabrication method for sub-200 nm Josephson junctions that reduces dielectric use and improves scalability and critical current tuning.

## Key findings

- Successful fabrication of 200 nm junctions with smooth contacts
- Wafer-scale scalability demonstrated
- Critical current density tunable from 0.1 to 3.0 kA/cm$^2$

## Abstract

We present a structure and a fabrication method for superconducting tunnel junctions down to the dimensions of 200 nm using i-line UV lithography. The key element is a side-wall-passivating spacer structure (SWAPS) which is shaped for smooth crossline contacting and low parasitic capacitance. The SWAPS structure enables formation of junctions with dimensions at or below the lithography-limited linewidth. An additional benefit is avoiding the excessive use of amorphous dielectric materials which is favorable in sub-Kelvin microwave applications often plagued by nonlinear and lossy dielectrics. We apply the structure to niobium trilayer junctions, and provide characterization results yielding evidence on wafer-scale scalability, and critical current density tuning in the range of 0.1 -- 3.0 kA/cm$^2$. We discuss the applicability of the junction process in the context of different applications, such as, SQUID magnetometers and Josephson parametric amplifiers.