Fault-tolerance thresholds for the surface code with fabrication errors

TL;DR

This paper investigates how fabrication errors impact the fault-tolerance thresholds of the surface code, proposing a supercheck operator approach to mitigate defects without additional overhead, and reports thresholds under realistic noise models.

Contribution

It introduces a supercheck operator method to handle fabrication defects in surface codes, avoiding extra computational overhead and extending fault-tolerance analysis to defective lattices.

Findings

Surface code tolerates up to 8% qubit fabrication errors.

Fault-tolerance threshold for computational errors is approximately 0.1%.

Method applicable to 2D chip-based quantum technologies.

Abstract

The construction of topological error correction codes requires the ability to fabricate a lattice of physical qubits embedded on a manifold with a non-trivial topology such that the quantum information is encoded in the global degrees of freedom (i.e. the topology) of the manifold. However, the manufacturing of large-scale topological devices will undoubtedly suffer from fabrication errors---permanent faulty components such as missing physical qubits or failed entangling gates---introducing permanent defects into the topology of the lattice and hence significantly reducing the distance of the code and the quality of the encoded logical qubits. In this work we investigate how fabrication errors affect the performance of topological codes, using the surface code as the testbed. A known approach to mitigate defective lattices involves the use of primitive SWAP gates in a long sequence of syndrome extraction circuits. Instead, we show that in the presence of fabrication errors the syndrome can be determined using the supercheck operator approach and the outcome of the defective gauge stabilizer generators without any additional computational overhead or the use of SWAP gates. We report numerical fault-tolerance thresholds in the presence of both qubit fabrication and gate fabrication errors using a circuit-based noise model and the minimum-weight perfect matching decoder. Our numerical analysis is most applicable to 2D chip-based technologies, but the techniques presented here can be readily extended to other topological architectures. We find that in the presence of 8% qubit fabrication errors, the surface code can still tolerate a computational error rate of up to 0.1%.

Full text

I Overview

Implementing topological quantum error correction codes has become the focus of many current experiments, with recent advances made in building small codes consisting of small numbers of physical qubits with fine-tuned local interactions Cory et al. (1998); Kelly et al. (2015); Reed et al. (2012); Chiaverini et al. (2004); Jin et al. (2012); Córcoles et al. (2015), hence paving the way for potential scalability in the coming years. However, it is expected that a universal topological fault-tolerant architecture will have an enormous number of physical components, and for such a large-scale machine the manufacturing and fine-tuning of each individual component will undoubtedly suffer from permanent faults resulting from imperfect manufacturing processes—we refer to such faults as fabrication errors. As an example, the latest non-universal D-Wave 2X machine has qubit manufacturing defects (typically fewer than 5%) King et al. . Therefore, it is important that the performance of the current schemes is studied against such a static error.

Surface codes are a family of stabilizer quantum error correction codes defined on a two-dimensional manifold with local vertex and plaquette stabilizer generators; the prototypical example is the toric code, introduced originally by Kitaev Kitaev (2003), see  Fig. 1a. This work focuses on using the square planar surface code Bravyi and Kitaev (1998) as a memory for a single logical qubit, but the close similarity between different types of stabilizer topological codes mean the results and techniques presented here are applicable to other families of codes, such as color codes Bombin and Martin-Delgado (2006).

The construction of topological codes relies on utilizing the non-trivial topology of a lattice to encode a logical state, such that the encoded state can only be corrupted by global errors. Such a construction is susceptible to fabrication errors by design, as fabrication errors directly damage the topology and introduce new degrees of freedom as well as lowering the code distance for the encoded logical states, see Fig. 1b.

The threshold performance of the surface codes has been extensively studied against many types of noise models, such as for Pauli errors Wang et al. (2003, 2011); Stephens (2014), stochastic qubit loss Stace et al. (2009); Stace and Barrett (2010), leakage Suchara et al. (2015); Fowler (2013); Whiteside and Fowler (2014); Ghosh and Fowler (2015); Wood and Gambetta , and general non-Pauli local noise for small codes Tomita and Svore (2014); A. S. Darmawan , but much less focus has been given to errors resulting from imperfect manufacturing processes. In this paper we investigate the threshold performance of the surface code in the presence of fabrication errors, and we show that the ability to disable a qubit or an entangling gate (a link) is sufficient to map any fabrication error into disabled qubits, hence allowing us to always form larger defected stabilizer operators, the so-called supercheck operators Stace et al. (2009). The scheme we present does not require anything that is not already necessary to perform computation by code deformation Raussendorf and Harrington (2007); Fowler et al. (2012) or lattice surgery Horsman et al. (2012). We will not discuss specific specific experimental implementations, but the techniques presented here could be directly applicable to chip-based designed for topological computation.

Two recent approaches have been proposed to mitigate the effect of fabrication errors; the first is to construct a robust topology that tolerates sparse fabrication errors using additional local graph encoding Tang and Miao (2016), and the second is to use primitive $\mathrm{SWAP}$ gates in the construction of the syndrome read-out circuit Nagayama et al. (2017). Our approach differs from these by keeping the construction of the surface code unaltered without attempting to mitigate the missing components or performing an adaptive procedure. We show that by performing (defected) gauge stabilizer operators Bombin (2010); Bravyi et al. (2013), supercheck operator outcomes can be obtained deterministically, see Sec. III. Our main result is summarised in Fig. 13, which shows Pauli error thresholds obtained by simulations of the surface code in the presence of fabrication errors.

This paper is structured as follows. In Sec. II we introduce the components of the surface code and the syndrome extraction circuits. In Sec. III we define the types of fabrication errors and how to perform the syndrome extraction circuits on a defected lattice by constructing the outcome of supercheck operators from the gauge qubit operators. We outline our noise model and Monte-Carlo simulation in Sec. IV and present the fault-tolerant thresholds we obtained in Sec. V. In the final two sections we discuss our approach in comparison to other schemes and conclude.

II The Surface Code

We define the surface code on an $L\times L$ square lattice with open boundaries as shown in Fig. 2, such that each edge represents a physical data qubit. The stabilizers of the code are generated by $X$-type and $Z$-type four-body operators associated with each star (or vertex) and each plaquette of the lattice, denoted here by $A_{s}$ and $B_{p}$, respectively. Collectively, the star and the plaquette operators are referred to as the check operators. The logical Pauli $X_{L}$ and $Z_{L}$ operators of the code are global anti-commuting string-like operators that span the lattice and commute with all the stabilizer generators, examples are shown on the primal lattice in Fig. 2. In other words, the logical $Z_{L}$ ($X_{L}$) operators have support over non-contractible loops on the primal (dual) lattice.

The action of a logical operator on a logical state of the surface code is invariant under a multiplication by a stabilizer generator, so many equivalent logical operators can be defined. The distance of the code corresponds to the weight of the shortest possible logical operator. Therefore, a perfectly fabricated surface code will have a code distance $L$. Increasing the lattice size would offer better protection against errors as the number of individual errors required to cause a logical error is greater.

Error detection proceeds by measuring all the stabilizer generators Dennis et al. (2002), such that when there are no errors, the outcome of all measurements is $+1$. Measuring all stabilizer generators collapses arbitrary qubit errors into Pauli $X$ and $Z$ errors on the data qubits Nielsen and Chuang (2000); Dennis et al. (2002); if an error anti-commutes with a stabilizer generator then the outcome of that stabilizer generator is flipped to $-1$. If a string of a single-type of Pauli error occurs, only the ends of the string are detectable, and different error strings may lead to the same detection pattern. The set of outcomes of stabilizer generator measurements is called the syndrome.

An error does not have to be corrected by exactly inverting the Pauli errors that caused it. Any string of errors and corrections that is a product of stabilizer generators is harmless (forming a contractible loop), however a string of errors and corrections that is equivalent to a logical operation leads to a failure. After obtaining the syndrome measurements, their values are passed to a decoder—a classical algorithm that finds the correction that is least-likely to result in a logical error (or at least a good approximation to this correction). In our analysis, we use the well-studied minimum-weight perfect-matching (MWPM) algorithm for our decoder Dennis et al. (2002).

The stabilizer generators are multi-qubit operators, which can be difficult to implement experimentally. To assist in measuring each stabilizer generator, an ancilla qubit, often called the syndrome qubit, is associated with each star and each plaquette operator in a local syndrome-extraction circuit, as shown in Fig. 3. The syndrome qubit is entangled to the qubits that support the stabilizer by an ordered sequence of two-qubit gates. Once this entangling procedure is executed, the outcome of the stabilizer generator is determined by measuring the ancilla qubit in the Pauli basis. By performing the two-qubit gates in a z-shaped order, as shown in Fig. 3, all the stabilizer generators can be measured simultaneously in a total of six time-steps: one for syndrome qubit preparation, four for two-qubit gates and one for syndrome qubit measurement (it may be possible to combine measurement and initialization for some implementations, but we consider them to be separate processes in our simulations). These six time steps constitute one round of syndrome measurement.

The components of the syndrome extraction circuit are themselves prone to the same type of errors as the data qubits of the code, which could lead to an incorrect (false) error detection event. Therefore, multiple rounds of syndrome measurements, $O(L)$, are needed to improve the confidence in the syndrome outcomes. The repeated rounds of syndrome measurements creates a 3D syndrome history, which can be processed by the decoder to return a correction operator on the physical lattice.

III Fabrication Errors

We define fabrication errors as permanent faulty components caused during the initial chip-manufacturing process of the surface code, or due to failed components arising during the lifetime of the chip. It is important to emphasize that the location of the fabrication errors is known before the surface code is used in the computation (i.e. the fabrication errors are known deterministic missing components). In addition, we assume that the user of the surface code chip is able to turn-off (or stop) any of the components. We consider two types of fabrication error: qubit fabrication errors and link fabrication errors. A qubit fabrication error is considered to be a qubit (either a data qubit or syndrome qubit) that is permanently faulty and cannot be used to store quantum information reliably. A link fabrication error is considered to be an error that prevents two qubits from interacting, i.e. it prevents a CNOT or CPHASE gate from being performed.

Before proceeding, it is useful to introduce some additional terminology to describe the different types of failed components we will encounter in our analysis. We use the term faulty to strictly refer to a component with a permanent fabrication error, and the term disabled to refer to a component that we have chosen to disable. Moreover, we call a check operator damaged if at least one of its four links suffers a fabrication error.

Fabrication errors are detrimental for the surface code construction; left unchecked, they can introduce new degrees of freedom (i.e. extra logical qubits). For example, if a syndrome qubit is faulty, one might be tempted to simply disable the associated stabilizer generator. But a disabled star or plaquette creates a new logical qubit that can interact with our desired logical qubit, therefore reducing the code distance. A reduction in code distance alone may not be a problem in itself, but if we assume fabrication errors are randomly spaced throughout the code then code distance will start to shrink with increasing $L$, leading to only a pseudo-threshold behavior for smaller lattice sizes that disappears for larger lattices.

We will now show how the detrimental effect of qubit and link fabrication errors can be mitigated at no additional hardware cost by disabling data qubits.

III.1 Measuring supercheck operators and gauge qubits

The idea of using supercheck operators was first introduced to combat lost data qubits in the toric code Stace et al. (2009). This approach works on the basis that the product of two stabilizer generators is also in the code stabilizer, so when a data qubit is lost (i.e. an edge is removed from the lattice) the two adjacent damaged stabilizer generators can be jointly measured—forming a larger supercheck operator—to avoid the lost data qubit, hence preserving the stabilizer structure of the code.

In the context of fabrication errors, the same approach can be used for data qubit fabrication errors. However, measuring a supercheck operator directly is often non-trivial task as it may require interaction between arbitrarily separated qubits or involve many SWAP gates, as was shown in  Nagayama et al. (2017), which can affect measurement of nearby stabilizer generators. Our approach for handling fabrication errors uses the same supercheck operator approach, but makes use of the concept of gauge qubits. Instead of measuring the supercheck operators themselves, we use the gauge qubits to construct the outcome of the supercheck operator from the direct outcome of damaged stabilizer generators measurement, such that all interactions remain as nearest-neighbor qubit interactions and no SWAP gates are required; any additional processing required is performed classically.

Consider the simple case of disabling a data qubit as shown in Fig. 4; the adjacent damaged generators will anti-commute, but their supercheck operator product remains deterministic. Each disabled data qubit in the surface code (except data qubits on the edge of the lattice, see Sec. III.4) introduces one degree of freedom, or gauge qubit (also called a “junk qubit” in Stace et al. (2009); Stace and Barrett (2010)), similar to when a stabilizer is turned-off to perform computation Fowler et al. (2012). The logical Pauli $X$ and $Z$ operators of these gauge qubits are the damaged star and plaquette stabilizers—we will refer to them as the gauge operators. When these anti-commuting gauge operators are measured, the logical state of the gauge qubit is randomized, but the state of the gauge qubit is unimportant, so this randomization is not a problem. Importantly, strings of $X$ or $Z$ operators cannot terminate undetectably in this region, unlike when a stabilizer generator is turned off—these gauge operators reduce the code distance slightly, but code distance still scales with physical lattice size.

The supercheck operator product of damaged stabilizer generators commutes with every damaged stabilizer generator, so the supercheck operators remain in the stabilizer group and can be used for error correction during the classical processing stage by treating the products of the damaged star and plaquette as supercheck operators.

III.2 Mapping fabrication errors to faulty data qubits

We saw in the previous section how in the presence faulty (or disabled) data qubits the outcome of a supercheck operator can still deterministically be obtained by taking the product of the outcomes of the damaged (gauge) operators. We will exploit this fact to map both link fabrication errors and syndrome qubit fabrication errors to data qubit fabrication errors such that supercheck operators can always be formed.

The mapping works as follows: 1) if a link fabrication error occurs, it is mapped to a qubit fabrication error on the data qubit to which it connects, so that the data qubit is disabled along with its associated links, as shown in Fig. 5. 2) If a syndrome qubit fabrication error occurs, it is mapped to qubit fabrication errors on all of the surrounding data qubits, so that all these data qubits along with their associated links are disabled, as shown in Fig. 6.

As a results we see that, in our approach, the syndrome qubit fabrication errors have the most destructive effect on the the lattice, which highlights an important bias between data and syndrome qubits.

III.3 Percolation thresholds and the effective code distance

The use of supercheck operators is limited by percolation—if a string of faulty or disabled data qubits percolates the lattice, a logical qubit cannot be encoded as it is impossible to form consistent spanning logical operators and supercheck operators. Note that it would be possible to use part of the lattice as a smaller code, but we consider percolating fabrication defects to be a manufacturing failure as the intended distance of the code cannot be achieved by making a larger lattice, and hence the surface code is discarded.

The square lattice structure of the surface code implies that the qubit percolation threshold for the surface code is equivalent to the bond percolation threshold for the square lattice, which is known analytic value of $50\%$. By using our mapping to data qubit fabrication errors, we can derive an approximate analytic percolation threshold in the presence of qubit and link fabrication errors using the following argument.

In the bulk of the lattice, each data qubit has four links. With a link fabrication error rate of $p_{\mathrm{link}}$, the probability of each data qubit being disabled due to faulty links is $1-(1-p_{\mathrm{link}})^{4}$, i.e. one minus the probability of no faulty links occurring. This implies that $50\%$ of data qubits will be disabled when $1-(1-p_{\mathrm{link}})^{4}=0.5$, or equivalently when $p_{\mathrm{link}}=1-\sqrt[4]{0.5}\approx 0.159$. This analysis does not account for qubits at the edges having fewer than four links, but the percolation threshold is an asymptotic behavior in the thermodynamic limit, so this effect can be neglected for large lattices.

An analogous argument can be used to calculate an approximate threshold for qubit fabrication errors. A data qubit will be disabled when it is either faulty or one or more of the four syndrome qubits it is linked to are faulty. The probability that a particular qubit is disabled when the qubit fabrication error rate is $p_{\mathrm{qubit}}$ is $1-(1-p_{\mathrm{qubit}})^{5}$. Therefore, the qubit fabrication error percolation threshold occurs approximately when $1-(1-p_{\mathrm{qubit}})^{5}=0.5$, or $p_{\mathrm{qubit}}=1-\sqrt[5]{0.5}\approx 0.129$. This analysis is less accurate than that for link fabrication errors as it does not take into account the possible correlations between disabled data qubits due to disabled syndrome qubits. However, localized clusters of disabled qubits are generally less likely to percolate than data qubits that are disabled at random, so we expect the actual threshold to be slightly higher.

Our numerical simulations for percolation, shown in Fig. 7 and Fig. 8 for link and qubit fabrication errors, respectively, are in strong agreement with our above estimations. We find the link fabrication threshold, Fig. 7, to be just under $16\%$ and the qubit fabrication threshold, Fig. 8, to be between $14\%$ and $15\%$ (higher than $12.9\%$ due to data qubit loss occurring in localized clusters).

Forming supercheck operators leads to a reduction in the effective code distance compared to the intended code distance as it reduces the length of the shortest logical operator. We have analyzed how the average effective code distance varies with link and qubit fabrication errors, as shown in Fig. 9 and Fig. 10, respectively. These graphs were produced by simulating the fabrication of many planar code lattices with each type of fabrication error and then finding the effective code distance of each lattice by identifying the lowest-weight logical operator; the effective code distance was then averaged over all runs.

III.4 Complications

There are two complications that occur when using gauge operators to measure supercheck operators. The first is that supercheck operators can only be measured during alternating rounds of syndrome measurement, and the second involves faulty data qubits at the edge of the lattice.

The interleaved z-shaped measurement pattern that allows all stabilizer generators to be measured simultaneously on a perfect lattice can no longer be used for supercheck operators. Ensuring that the product of damaged stabilizers is deterministic requires that no anti-commuting operations are performed while the constituent gauge operators of the supercheck operators are being measured; this is not possible with the normal measurement pattern, as the example in Fig. 11 shows. This problem is mitigated by measuring $X$-type and $Z$-type supercheck operators during alternating rounds. All undamaged stabilizer generators are measured every round as normal; this means that supercheck operators are measured half as frequently as undamaged stabilizer generators, and these measurements have a higher effective error rate than undamaged stabilizer generator measurements.

The second issue occurs when data qubits are faulty at the edges of the lattice. If there is a data qubit fault such as that shown in Fig. 12, then there is no corresponding stabilizer generator to pair it with. Therefore, the edge of the lattice must be redefined by completely disabling the damaged stabilizer generator. This process must then be repeated if any of the qubits in this new edge are faulty—the process effectively results in a supercheck operator being disabled.

IV Simulation Methods

IV.1 Error model

Every gate is modelled to experience computational Pauli errors with a probability denoted here by the parameter $p_{\mathrm{comp}}$. Each two-qubit gate is assumed to act perfectly followed by a depolarizing Pauli noise with probability $p_{\mathrm{comp}}$. Single qubit gates (only the identity gate in our simulations) are assumed to act perfectly followed by depolarizing noise with probability $4p_{\mathrm{comp}}/5$. The justification for this follows that of Knill (2005): $4p/5$ is the marginal error rate on each qubit involved in a two-qubit gate experiencing depolarizing noise with probability $p$. If we were to choose a single-qubit error rate of $p_{\mathrm{comp}}$, this would imply that single-qubit gates are more prone to errors than two-qubit gates, which is unlikely to be the case. Preparation is considered to have probability $p_{\mathrm{comp}}$ of preparing the state in an orthonormal basis, and measurement is considered to have a probability $p_{\mathrm{comp}}$ of giving the incorrect outcome.

All fabrication errors are considered to occur independently before error correction is initiated, and the locations of all fabrication errors are assumed to be known. A qubit fabrication error occurs with probability $p_{\mathrm{qubit}}$ for each qubit (syndrome and data qubits) and link fabrication errors occur with probability $p_{\mathrm{link}}$ for each link. The parameters $p_{\mathrm{comp}}$, $p_{\mathrm{qubit}}$ and $p_{\mathrm{link}}$ are varied independently.

IV.2 Simulations

Each simulation starts by generating a lattice of qubits and links with the appropriate fabrication error rates. The fabrication errors are then mapped to data qubit fabrication using the mapping in Sec. III.2. Suitable logical operators are found by using a path finding routine on the primal and dual lattices. If a logical operator cannot be found, then the lattice is percolated by faulty (or disabled) data qubits and the simulation is aborted.

When a logical operator is found, $2\times L$ rounds of syndrome measurement are performed. Each round consists of syndrome qubit initialization, four stages of two-qubit gates and then syndrome qubit measurement. Each of these is considered to take one unit of time, and any qubit that is not involved in a two-qubit gate, measurement or preparation during a particular time step undergoes an identity gate.

The code is initialized with a round of perfect star and plaquette measurements to get the error-free outcomes for each star and plaquette measurement, and the simulations are capped with a final round of perfect measurement. All other rounds of stabilizer measurement use the Pauli error model given above.

We use the CHP Aaronson and Gottesman (2004) stabilizer algorithm to simulate the quantum state of the lattice during all gates and measurements to ensure that the gauge operators give the correct outcomes. Once all measurements have been obtained, a MWPM routine involving Blossom V Kolmogorov (2009) is used to find a correction based on the measured syndrome. Edge weights for the perfect matching routine are set using the same methods as Bravyi and Vargo (2013); Suchara et al. (2015) to optimize the matching. Syndrome measurement is simulated on both the primal and dual lattices, but error correction is only performed on one lattice to reduce computation time (the symmetry between primal and dual lattices means that logical error rates are almost identical). Once the correction has been applied, we test for the occurrence of a logical $X$ error by checking if the combined error and correction string commutes with the logical $Z$ operator.

Pauli error rates are varied from $p_{\mathrm{comp}}=0.05\%$ to $p_{\mathrm{comp}}=1.00\%$ in steps of $0.05\%$, with additional values of $0.001\%<p_{\mathrm{comp}}<0.010\%$ used when the Pauli error threshold becomes small. Each fabrication error rate is separately varied from from 0% to 10% in steps of 2%, with an additional simulation performed at 5% fabrication error rate to allow for a direct comparison with Nagayama et al. (2017). Each combination of error rates and code distances is simulated for a minimum of $5\times 10^{4}$ runs.

V Threshold results

Our main result is Fig. 13, which shows how the planar code Pauli error threshold varies with each type of fabrication error. Thresholds for each fabrication error rate are obtained by finding the crossing point of logical error rates when results for each code distance are plotted on the same graph Wang et al. (2003); these plots are available in the supplementary material sup . Instances in which faulty or disabled data qubits percolate the lattice, such that a logical qubit cannot be encoded, are ignored, i.e. the logical error rate is given by the number of logical errors divided by the number of non-percolating runs. The percolation graphs in Fig. 7 and Fig. 8 give an indication of the frequency of such percolation errors.

As expected, qubit fabrication errors have a slightly more damaging effect on the threshold than link fabrication errors. With no fabrication errors, the chosen error model results in a Pauli error threshold of $p_{\mathrm{comp}}\approx 0.71\%$. As $p_{\mathrm{qubit}}$ and $p_{\mathrm{link}}$ increase, the thresholds of $p_{\mathrm{comp}}$ decrease, with the respective thresholds dropping below $0.1\%$ when $p_{qubit}\gtrsim 8\%$ and $p_{link}\gtrsim 10\%$. It has not been possible to find clean thresholds to determine the behavior of the thresholds beyond $p_{\mathrm{link}}=10.6\%$ and $p_{\mathrm{qubit}}=8.4\%$; this is due to effective code distances converging as fabrication error rates increase—finding thresholds requires a range of code distances, but as shown in Fig. 9 and Fig. 10, the average effective code distances for link fabrication error rates of 12% qubit fabrication error rates of 10% are all $\lesssim 2$ for the lattice sizes considered.

An exponential fit of the form $\alpha\exp(\beta\,p_{\mathrm{fab}})$ to each data set results in fits of $\alpha=0.70,\ \beta=-22$ for qubit fabrication errors and $\alpha=0.71,\ \beta=-20$ for link fabrication errors. These fits fail close to the percolation threshold but are in good agreement with the simulation results for $p_{\mathrm{qubit}}\leq 0.08$ and $p_{\mathrm{link}}\leq 0.1$.

VI Discussion

The logical error rate, $p_{log}$, depends on both the intended code distance $L$ and the actual distance $L^{\prime}$, such that $p_{log}=p_{log}(L,L^{\prime})$. Fabrication errors mean that $L^{\prime}\leq L$. We find that $p_{log}(L^{\prime},L^{\prime})<p_{log}(L,L^{\prime})$, i.e. fabrication errors degrade the code performance beyond simply reducing the code distance, as shown in fig 14. The larger codes perform worse because the higher-weight supercheck operators are more prone to error and give less-specific information about the location of an error compared to a native code. This suggests that building a larger surface code is generally only beneficial if the fabrication error rate does not increase.

Our thresholds for qubit fabrication errors are slightly lower than that of Nagayama et al. (2017). This is because a faulty syndrome qubit is more damaging in our scheme as each syndrome qubit fabrication error is mapped to multiple disabled data qubits; this results in lower percolation error thresholds and lower effective code distances for qubit fabrication errors. However, the gauge operator approach we present may be better for handling data qubit fabrication errors as it requires fewer logic gates. It is also worth noting that from the point of view of the implementation, our code does not require the performance of any extra gates, as the approach presented in Nagayama et al. (2017) does. All the adaptations required by our scheme involve a change in the measurement order and disabling particular measurements, not any new gates. We believe this will be a more amenable adaptation for some physical systems. Moreover, link fabrication errors were not considered in Nagayama et al. (2017).

Additional simulations were performed to investigate the scaling of the weight of the largest supercheck operator as code distance increases; Fig. 15 shows this scaling for $p_{\mathrm{link}}=10\%$ and demonstrates that larger lattice sizes have higher-weight supercheck operators. This phenomenon can be understood by considering the similarity between clustering in subcritical percolation Bazant (2000) and forming supercheck operators on a surface code.

Higher-weight supercheck operators are more prone to error, so this effect means that the thresholds observed for smaller lattice sizes are not stable. This instability will lead to pseudo-thresholds behavior, where the threshold disappear with increasing lattice size.

This problem is not unique to our approach; it is a feature of any surface code or topological cluster state code based around the supercheck operators introduced in Stace et al. (2009), including Barrett and Stace (2010) and Nagayama et al. (2017). Finding a way to overcome this problem, or proposing an alternative to supercheck operators, remains an open problem.

VII Conclusion

We have presented a full analysis for the threshold performance of the surface code in the presence of fabrication errors. We showed that the ability to disable qubits or links (two-qubit gates) is sufficient to map the fabrication errors into lost qubits, such that the syndrome extraction can be performed without the need of any additional hardware components. Our method combines the supercheck operator approach and the concept of gauge qubit operators to deterministically obtain the outcome of supercheck operators. Interestingly, our approach shows that syndrome qubit fabrication errors have a more drastic damaging effect on the lattice in comparison to data qubit fabrication errors, showing that more care is required to fabricate high quality syndrome qubits.

One advantage of the the scheme presented here is that it should be applicable to non gate-based implementations where SWAP gates may not be feasible, such as O’Gorman et al. (2016). However, in schemes where the SWAP gate is readily available, the gauge operator scheme presented in this work and the SWAP gate scheme of Nagayama et al. (2017) can be complementary schemes. For data qubit fabrication errors, the scheme presented here requires fewer quantum operations to obtain syndrome data so would be preferable. However, the scheme in  Nagayama et al. (2017) would be preferable to deal with syndrome qubit fabrication errors, as it still allows for the measurement of stabilizer generators associated with faulty syndrome qubits. Therefore, a hybrid of both approaches could lead to an improvement in the overall performance.

The fabrication error model presented here can be expanded to include cases where the fabrication process results in components of different quality, such that some components are fabricated with higher chance of being prone to computational Pauli errors. Such an asymmetry in the quality of fabricated components is to be expected for large-scale systems, but we leave such analysis for future investigations.

Acknowledgements.

We are grateful to Terry Rudolph and Pete Shadbolt for all the useful discussions which ultimately led to this work. We wish to thank Hector Bombin for bringing to our attention the issue of the growing size of supercheck operators with code size. JMA is supported by EPSRC. HA wishes to thank Alessio Serafini for his comments on this work and acknowledges financial support by EPSRC (grant EP/K026267/1). MGS is supported by EPSRC. TMS acknowledges funding from The Australian Research Council (ARC) Centre of Excellence in Engineered Quantum Systems, and an ARC Future Fellowship. The authors acknowledge the use of the UCL Legion High Performance Computing Facility (Legion@UCL), and associated support services, in the completion of this work.