# Demystifying the Characteristics of 3D-Stacked Memories: A Case Study for Hybrid Memory Cube

## TL;DR

This paper thoroughly characterizes the thermal behavior, latency factors, and performance bottlenecks of the Hybrid Memory Cube, a 3D-stacked memory technology, revealing temperature as a key limitation and providing insights for future memory designs.

## Contribution

It is the first study to analyze the thermal characteristics of HMC in a real environment and to deconstruct latency sources, advancing understanding of 3D-stacked memory performance.

## Key findings

- Temperature significantly impacts HMC performance and reliability.
- Latency sources vary between high- and low-load accesses.
- Thermal behavior constrains future 3D-stacked memory design.

## Abstract

Three-dimensional (3D)-stacking technology, which enables the integration of DRAM and logic dies, offers high bandwidth and low energy consumption. This technology also empowers new memory designs for executing tasks not traditionally associated with memories. A practical 3D-stacked memory is Hybrid Memory Cube (HMC), which provides significant access bandwidth and low power consumption in a small area. Although several studies have taken advantage of the novel architecture of HMC, its characteristics in terms of latency and bandwidth or their correlation with temperature and power consumption have not been fully explored. This paper is the first, to the best of our knowledge, to characterize the thermal behavior of HMC in a real environment using the AC-510 accelerator and to identify temperature as a new limitation for this state-of-the-art design space. Moreover, besides bandwidth studies, we deconstruct factors that contribute to latency and reveal their sources for high- and low-load accesses. The results of this paper demonstrates essential behaviors and performance bottlenecks for future explorations of packet-switched and 3D-stacked memories.