Sparse Iterative Learning Control with Application to a Wafer Stage: Achieving Performance, Resource Efficiency, and Task Flexibility

TL;DR

This paper introduces a convex optimization-based iterative learning control framework that enforces sparsity to improve resource efficiency, disturbance attenuation, and flexibility, demonstrated on a wafer stage application.

Contribution

It develops a novel sparse ILC framework using convex relaxations, enabling structured control design for resource-efficient and robust performance.

Findings

Effective sparsity enforcement in ILC via convex relaxations.

Successful application to wafer stage control demonstrating improved resource use.

Enhanced disturbance attenuation and task flexibility in experimental results.

Abstract

Trial-varying disturbances are a key concern in Iterative Learning Control (ILC) and may lead to inefficient and expensive implementations and severe performance deterioration. The aim of this paper is to develop a general framework for optimization-based ILC that allows for enforcing additional structure, including sparsity. The proposed method enforces sparsity in a generalized setting through convex relaxations using $\ell_1$ norms. The proposed ILC framework is applied to the optimization of sampling sequences for resource efficient implementation, trial-varying disturbance attenuation, and basis function selection. The framework has a large potential in control applications such as mechatronics, as is confirmed through an application on a wafer stage.