# A radiation-hard dual-channel 12-bit 40 MS/s ADC prototype for the ATLAS liquid argon calorimeter readout electronics upgrade at the CERN LHC

## TL;DR

This paper presents a radiation-hard dual-channel 12-bit 40 MS/s pipeline ADC designed for the ATLAS liquid argon calorimeter upgrade at CERN, demonstrating high performance and radiation tolerance in a 130 nm CMOS process.

## Contribution

It introduces a novel radiation-hard dual-channel pipeline ADC with high speed, low power, and verified radiation tolerance suitable for high-energy physics experiments.

## Key findings

- Achieved 67.9 dB SNDR at 10 MHz for 40 MS/s operation
- Power consumption of 50 mW per channel
- Radiation testing confirms system requirements are met

## Abstract

The readout electronics upgrade for the ATLAS Liquid Argon Calorimeters at the CERN Large Hadron Collider requires a radiation-hard ADC. The design of a radiation-hard dual-channel 12-bit 40 MS/s pipeline ADC for this use is presented. The design consists of two pipeline A/D channels each with four Multiplying Digital-to-Analog Converters followed by 8-bit Successive-Approximation-Register analog-to-digital converters. The custom design, fabricated in a commercial 130 nm CMOS process, shows a performance of 67.9 dB SNDR at 10 MHz for a single channel at 40 MS/s, with a latency of 87.5 ns (to first bit read out), while its total power consumption is 50 mW/channel. The chip uses two power supply voltages: 1.2 and 2.5 V. The sensitivity to single event effects during irradiation is measured and determined to meet the system requirements.