Layered semiconductor devices with water top-gates: High on-off ratio field-effect transistors and aqueous sensors
Yuan Huang, Eli Sutter, and Peter Sutter

TL;DR
This paper demonstrates that de-ionized water can serve as an effective top gate for layered semiconductor FETs, enabling high on-off ratios, low hysteresis, and potential for aqueous sensing applications.
Contribution
It introduces the use of DI water as a simple, efficient top gate for layered semiconductors, improving device performance and enabling sensing functionalities.
Findings
High on-off current ratios achieved with water gating
Hysteresis eliminated by high-k solution screening
Potential for glucose sensing demonstrated
Abstract
Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore de-ionized (DI) water as a solution top gate for field-effect switching of layered semiconductors including SnS2, MoS2, and black phosphorus. The DI water gate is easily fabricated, can sustain rapid bias changes, and its efficient coupling to layered materials provides high on-off current ratios, a near-ideal sub-threshold swing, and enhanced shortchannel behavior even for FETs with thick, bulk-like channels. Screening by the high-k solution gate eliminates hysteresis due to surface and interface trap states and substantially enhances the field-effect mobility. The onset of water electrolysis sets the ultimate limit to DI water gating at large negative gate bias. Measurements in this regime show promise for…
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Taxonomy
Topics2D Materials and Applications · Advanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices
