Overlap junctions for high coherence superconducting qubits
X. Wu, J. L. Long, H. S. Ku, R. E. Lake, M. Bal, D. P. Pappas

TL;DR
This paper presents a new fabrication method for high-coherence superconducting qubits using overlap junctions formed with standard processes, eliminating shadow masks and enabling CMOS-compatible manufacturing.
Contribution
It introduces an overlap junction fabrication technique with in situ Ar milling that maintains high coherence and simplifies the process for scalable quantum device production.
Findings
High coherence achieved with overlap junctions on aluminum surfaces.
Elimination of angle-dependent shadow masks in junction fabrication.
Compatibility with conventional CMOS processing methods.
Abstract
Fabrication of sub-micron Josephson junctions is demonstrated using standard processing techniques for high-coherence, superconducting qubits. These junctions are made in two separate lithography steps with normal-angle evaporation. Most significantly, this work demonstrates that it is possible to achieve high coherence with junctions formed on aluminum surfaces cleaned in situ with Ar milling before the junction oxidation. This method eliminates the angle-dependent shadow masks typically used for small junctions. Therefore, this is conducive to the implementation of typical methods for improving margins and yield using conventional CMOS processing. The current method uses electron-beam lithography and an additive process to define the top and bottom electrodes. Extension of this work to optical lithography and subtractive processes is discussed.
| Qubit frequency () | GHz |
|---|---|
| Despersive shift () | MHz |
| Transmon Nonlinearilty () | MHz |
| Qubit relaxation () | s |
| Qubit dephasing () | s |
| Spin echo () | s |
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Overlap junctions for high coherence superconducting qubits
X. Wu
National Institute of Standards and Technology, Boulder, Colorado 80305, USA
J. L. Long
National Institute of Standards and Technology, Boulder, Colorado 80305, USA
Department of Physics, University of Colorado, Boulder, Colorado 80309, USA
H. S. Ku
National Institute of Standards and Technology, Boulder, Colorado 80305, USA
R. E. Lake
National Institute of Standards and Technology, Boulder, Colorado 80305, USA
M. Bal
National Institute of Standards and Technology, Boulder, Colorado 80305, USA
D. P. Pappas
National Institute of Standards and Technology, Boulder, Colorado 80305, USA
Abstract
Fabrication of sub-micron Josephson junctions is demonstrated using standard processing techniques for high-coherence, superconducting qubits. These junctions are made in two separate lithography steps with normal-angle evaporation. Most significantly, this work demonstrates that it is possible to achieve high coherence with junctions formed on aluminum surfaces cleaned in situ with Ar milling before the junction oxidation. This method eliminates the angle-dependent shadow masks typically used for small junctions. Therefore, this is conducive to the implementation of typical methods for improving margins and yield using conventional CMOS processing. The current method uses electron-beam lithography and an additive process to define the top and bottom electrodes. Extension of this work to optical lithography and subtractive processes is discussed.
pacs:
03.67.Lx
Superconducting devices implemented as quantum bits (qubits) are among the leading candidates for building quantum computers. Key elements in all types of superconducting qubits are Josephson junctions, which are the non-linear elements in the superconducting circuitry. This non-linearity separates the two lowest energy levels from higher excitations, forming a two-level system as the physical qubit. Coherence times of superconducting qubits have been increased significantly in both 2D and 3D geometries (10-100s) Paik et al. (2011); Rigetti et al. (2012); Chen et al. (2014); Chu et al. (2016); Dial et al. (2016). These relatively long coherence times, combined with fast, high-fidelity gate schemes, have enabled the demonstration of quantum error detection with superconducting devices Chow et al. (2011); Sheldon et al. (2016); Martinis and Geller (2014).
While the design and fabrication for various other elements that form quantum circuits, i.e., resonators, shunt capacitors, and inductors, have been well studied and brought into line with standard cleanroom techniques, the preparation of the non-linear Josephson junction is still typically conducted separately on a device-by-device basis. In general, low participation ratios from both the Josephson junction and it’s immediate surroundings are essential to the success of present-day superconducting qubits Chu et al. (2016); Weides et al. (2011). This goal is typically achieved by shrinking the junction size. These low-loss junctions have predominantly been fabricated using a multi-angle shadow-evaporation (SE) technique, because it naturally yields small structures in a single step process and works well enough for demonstrations of small-scale circuits Dolan (1977); Potts et al. (2001). SE is also convenient in that the oxidation of the base electrode is conducted in-situ on the as-deposited film and, then immediately covered by the top electrode.
To satisfy the requirement of scalability of quantum circuits, it is becoming critical to bring the junction fabrication step in line with standard fabrication techniques. This is difficult with the angle-dependence of the SE technique because it limits the wafer size for preparing junctions with tight margins. One possible avenue is to use overlap junctions, as shown in Ref. Steffen et al. (2006), where the two electrodes of Josephson junctions are prepared in separate steps. The coherence time from Ref. Steffen et al. (2006) is predominately limited by its lossy shunt capacitor and the relatively large junction. Therefore the intrinsic loss of junctions made with the overlap technique could not be evaluated. In this paper, we describe the fabrication of an overlap-junction, concentric-transmon qubit Braumuller et al. (2016) that exhibits long coherence times.
Details of the process to form the Al/AlOx/Al tunnel junction are illustrated in Fig. 1. Due to the small size of the junction (100 nm), we used a standard PMMA/Copolymer (50 nm/100 nm) bilayer resist and electron-beam lithography to pattern the overlap junctions. As shown in Fig. 1(a), the base electrode is prepared by evaporating Al ( nm thickness) from an electron-beam deposition source. After taking the sample out of the vacuum chamber, a native oxide forms immediately on the surface of the Al [Fig. 1(b)]. A second lithography is performed to define the top electrode before the sample is loaded into the evaporator again. The tunnel barrier is formed by making use of an argon RF-plasma cleaning step (50 W, 10 mTorr) followed by room temperature oxidation of the base electrode. During this step, we fix the oxidation pressure at 150 mTorr for a short amount of time, typically 1-5 minutes. Notably, this oxidation time is an order of magnitude shorter than the oxidation time used in the SE technique, of which oxidation happens on fresh deposited Al. This is presumably because the Ar RF plasma not only etches away the native oxide formed on the Al surface, but also roughens the Al surface, hence increasing the rate of oxidation. Finally, the top Al electrode ( nm thickness) is deposited, depicted in Fig. 1(e). Figure 1(f) shows a complete overlap junction after the metal-liftoff process.
We measure the room-temperature resistance of the junctions made with this method and find that the relations between , oxidation time and junction area follow the empirical formula (Eq.1), which is consistent with Ref. Zeng et al. (2015).
[TABLE]
From our measurements, we find this relation holds well for junction sizes greater than 0.01 m2. We believe this lower limit on junction size is due to the process bias of the specific resist used and can be easily mitigated. More importantly, because our method uses normal-angle evaporation, high junction uniformity across a larger area can be achieved. For example, substrate rotation can be implemented during the evaporation to achieve film homogeneity, which is a standard technique used throughout the industry. This overlap method can also be modified for compatibility into a standard processing flow. For example, a subtractive process will yield similar structures given that the top and bottom electrodes are grown, defined, and patterned using sputter deposition, optical lithography, and etching, respectively. Smaller dimensions can also be achieved via etching, while some extra attention will be required to avoid redepostion on the edges of the junction, a standard technique in magnetic tunnel junction fabrication Yang et al. (2015).
To form the large-scale features of our device, such as the resonator and shunt capacitor of the transmon qubit, we use thin-film NbTiN ( 35 nm). The NbTiN is grown at 500*∘C with reactive sputter deposition and exhibits low loss Vissers et al. (2010); Chang et al. (2013). A reactive ion etch with SF6* is used to pattern our device, except in the junction area, as shown in Fig. 2(b). The NbTiN in the junction area is removed using a wet etch because it does not attack Si, leaving a smooth surface for patterning the overlap junctions. The chemical used in this wet etch is NH3OH/H2O2/H2O (1:2:5) and the solution needs to be heated above 60C for this etching process.
The concentric transmon design was chosen as a test qubit because of low radiation loss Braumuller et al. (2016). The qubit consists of a single overlap junction shunted by a circular capacitor. Unlike the original design, there is a slit in the outer ring to avoid flux trapping. Figures 2(a) and 2(b) show the schematic of our measurement setup and images of our device. The qubit is capacitively coupled to a microstrip resonator ( GHz) with a coupling strength 69 MHz. The qubit parameters measured from this device are shown in Table 1, and the qubit excited state decay curves are shown in Fig 3. The measured relaxation time and decoherence time are 34.3 s and 22.5 s, respectively. The Purcell limit due to qubit-cavity coupling is 47s Purcell (1946), therefore we believe our measured could be Purcell limited. We used two methods to measure the decoherence time, which are the “Ramsey” time () and the “Echo” time () Abragam (1985); Hahn (1950). The pulse sequence for measuring is shown in the inset of Fig 3(b). To measure , a -pulse is inserted half-way between the pulses. The pulse reverses the direction of dephasing for the second half of the waiting time (t), thus it “echoes” out slow drifts in the qubit frequency. We measured , suggesting that the qubit is subject to some low-frequency noise that the echo successfully cancels out. However, since , this shows that there is also some decoherence due to high-frequency noise, that the echo cannot remove. The fact that qubits made with overlap junctions have long coherence times shows that Josephson junctions made with separate steps do not introduce extra loss to the superconducting quantum circuit.
In conclusion, we presented an alternative method of fabricating nano-scale Josephson junctions for superconducting qubits. This method only involves normal-angle evaporation, has no angle dependence, which makes it compatible with large scale fabrication process. We also demonstrated that a 2D transmon qubit made with overlap junctions still has long coherence. This opens up the possibility of multi-step fabrication of Josephson junction based qubits.
Acknowledgements.
This work was supported by the Intelligence Advanced Research Projects Activity (IARPA) LogiQ Program and the NIST Quantum Based Metrology Initiative. This work is property of the US Government and not subject to copyright.
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