Epitaxy of Advanced Nanowire Quantum Devices

TL;DR

This paper presents a bottom-up synthesis technique for complex nanowire networks with high crystalline quality and superconducting interfaces, enabling advanced quantum device architectures for topological quantum computing.

Contribution

It introduces a novel method for fabricating epitaxial nanowire networks with predefined superconducting islands, crucial for braiding non-Abelian anyons.

Findings

High crystalline quality of nanowire junctions

Observation of phase coherent effects indicating strong spin-orbit coupling

Demonstration of a proximity-induced hard superconducting gap

Abstract

Semiconductor nanowires provide an ideal platform for various low-dimensional quantum devices. In particular, topological phases of matter hosting non-Abelian quasi-particles can emerge when a semiconductor nanowire with strong spin-orbit coupling is brought in contact with a superconductor. To fully exploit the potential of non-Abelian anyons for topological quantum computing, they need to be exchanged in a well-controlled braiding operation. Essential hardware for braiding is a network of single-crystalline nanowires coupled to superconducting islands. Here, we demonstrate a technique for generic bottom-up synthesis of complex quantum devices with a special focus on nanowire networks having a predefined number of superconducting islands. Structural analysis confirms the high crystalline quality of the nanowire junctions, as well as an epitaxial superconductor-semiconductor interface. Quantum transport measurements of nanowire "hashtags" reveal Aharonov-Bohm and weak-antilocalization effects, indicating a phase coherent system with strong spin-orbit coupling. In addition, a proximity-induced hard superconducting gap is demonstrated in these hybrid superconductor-semiconductor nanowires, highlighting the successful materials development necessary for a first braiding experiment. Our approach opens new avenues for the realization of epitaxial 3-dimensional quantum device architectures.