A Distributed Shared Memory Model and C++ Templated Meta-Programming Interface for the Epiphany RISC Array Processor

TL;DR

This paper introduces a software-supported distributed shared memory model for the Epiphany RISC array processor, utilizing C++ templated metaprogramming to simplify parallel programming on this energy-efficient many-core architecture.

Contribution

It presents a novel DSM model implemented with C++ templates that enables simpler parallel programming tailored for the Epiphany architecture.

Findings

The DSM model demonstrates effective support for data sharing without explicit data movement control.

Initial results show the programming model's efficiency and suitability for the architecture.

The approach provides insights into the NoC's capability to support DSM.

Abstract

The Adapteva Epiphany many-core architecture comprises a scalable 2D mesh Network-on-Chip (NoC) of low-power RISC cores with minimal uncore functionality. Whereas such a processor offers high computational energy efficiency and parallel scalability, developing effective programming models that address the unique architecture features has presented many challenges. We present here a distributed shared memory (DSM) model supported in software transparently using C++ templated metaprogramming techniques. The approach offers an extremely simple parallel programming model well suited for the architecture. Initial results are presented that demonstrate the approach and provide insight into the efficiency of the programming model and also the ability of the NoC to support a DSM without explicit control over data movement and localization.