Thermal Conductance of a Single-Electron Transistor
B. Dutta, J. T. Peltonen, D. S. Antonenko, M. Meschke, M. A., Skvortsov, B. Kubala, J. K\"onig, C. B. Winkelmann, H. Courtois, J. P. Pekola

TL;DR
This study investigates heat and charge transport in a single-electron transistor, revealing violations of the Wiedemann-Franz law and nonlinear heat current behavior, advancing understanding of nanoscale thermal management.
Contribution
It provides the first combined measurement of heat and charge transport in a single-electron transistor, demonstrating deviations from classical laws and theoretical predictions.
Findings
Wiedemann-Franz law is systematically violated away from charge degeneracy points.
Heat current deviates from quadratic temperature dependence at large temperature drops.
Deviations align with theoretical expectations.
Abstract
We report on combined measurements of heat and charge transport through a single-electron transistor. The device acts as a heat switch actuated by the voltage applied on the gate. The Wiedemann-Franz law for the ratio of heat and charge conductances is found to be systematically violated away from the charge degeneracy points. The observed deviation agrees well with the theoretical expectation. With large temperature drop between the source and drain, the heat current away from degeneracy deviates from the standard quadratic dependence in the two temperatures.
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Thermal Conductance of a Single-Electron Transistor
B. Dutta
Université Grenoble Alpes, CNRS, Institut Néel, 25 Avenue des Martyrs, 38042 Grenoble, France
J. T. Peltonen
Low Temperature Laboratory, Department of Applied Physics, Aalto University School of Science, P.O. Box 13500, 00076 Aalto, Finland
D. S. Antonenko
Skolkovo Institute of Science and Technology, Skolkovo, 143026 Moscow, Russia
L. D. Landau Institute for Theoretical Physics, 142432 Chernogolovka, Russia
Moscow Institute of Physics and Technology, Moscow, 141700, Russia
M. Meschke
Low Temperature Laboratory, Department of Applied Physics, Aalto University School of Science, P.O. Box 13500, 00076 Aalto, Finland
M. A. Skvortsov
Skolkovo Institute of Science and Technology, Skolkovo, 143026 Moscow, Russia
L. D. Landau Institute for Theoretical Physics, 142432 Chernogolovka, Russia
Moscow Institute of Physics and Technology, Moscow, 141700, Russia
B. Kubala
Institute for Complex Quantum Systems and IQST, University of Ulm, 89069 Ulm, Germany
J. König
Theoretische Physik and CENIDE, Universität Duisburg-Essen, 47048 Duisburg, Germany
C. B. Winkelmann
Université Grenoble Alpes, CNRS, Institut Néel, 25 Avenue des Martyrs, 38042 Grenoble, France
H. Courtois
Université Grenoble Alpes, CNRS, Institut Néel, 25 Avenue des Martyrs, 38042 Grenoble, France
J. P. Pekola
Low Temperature Laboratory, Department of Applied Physics, Aalto University School of Science, P.O. Box 13500, 00076 Aalto, Finland
Université Grenoble Alpes, CNRS, Institut Néel, 25 Avenue des Martyrs, 38042 Grenoble, France
Low Temperature Laboratory, Department of Applied Physics, Aalto University School of Science, P.O. Box 13500, 00076 Aalto, Finland
Skolkovo Institute of Science and Technology, Skolkovo, 143026 Moscow, Russia
L. D. Landau Institute for Theoretical Physics, 142432 Chernogolovka, Russia
Moscow Institute of Physics and Technology, Moscow, 141700, Russia
Low Temperature Laboratory, Department of Applied Physics, Aalto University School of Science, P.O. Box 13500, 00076 Aalto, Finland
Skolkovo Institute of Science and Technology, Skolkovo, 143026 Moscow, Russia
L. D. Landau Institute for Theoretical Physics, 142432 Chernogolovka, Russia
Moscow Institute of Physics and Technology, Moscow, 141700, Russia
Institute for Complex Quantum Systems and IQST, University of Ulm, 89069 Ulm, Germany
Theoretische Physik and CENIDE, Universität Duisburg-Essen, 47048 Duisburg, Germany
Université Grenoble Alpes, CNRS, Institut Néel, 25 Avenue des Martyrs, 38042 Grenoble, France
Université Grenoble Alpes, CNRS, Institut Néel, 25 Avenue des Martyrs, 38042 Grenoble, France
Low Temperature Laboratory, Department of Applied Physics, Aalto University School of Science, P.O. Box 13500, 00076 Aalto, Finland
Abstract
We report on combined measurements of heat and charge transport through a single-electron transistor. The device acts as a heat switch actuated by the voltage applied on the gate. The Wiedemann-Franz law for the ratio of heat and charge conductances is found to be systematically violated away from the charge degeneracy points. The observed deviation agrees well with the theoretical expectation. With large temperature drop between the source and drain, the heat current away from degeneracy deviates from the standard quadratic dependence in the two temperatures.
pacs:
73.23.Hk
The flow of heat at the microscopic level is a fundamentally important issue, in particular if it can be converted into free energy via thermoelectric effects Sothmann2014 . The ability of most conductors to sustain heat flow is linked to the electrical conductance via the Wiedemann-Franz law: , where is the heat conductance, the Lorenz number and the temperature. While the understanding of quantum charge transport in nano-electronic devices has reached a great level of maturity, heat transport experiments are lagging far behind Dubi2009 , for two essential reasons: (i) unlike charge, heat is not conserved and (ii) there is no simple thermal equivalent to the ammeter. Heat transport can nevertheless give insight to phenomena that charge transport is blind to Chiatti2006 ; Banerjee2016 and, remarkably, a series of experiments has demonstrated the very universality of the quantization of heat conductance, regardless of the carriers statistics Schwab2000 ; Meschke2006 ; Molenkamp1992 ; Chiatti2006 ; Hoffman2008 ; Jezouin2013 ; Banerjee2016 ; ScienceReddy ; Mosso17 .
As device dimensions are reduced, electron interactions gain capital importance, leading to Coulomb blockade in mesoscopic devices in which a small island is connected by tunnel junctions. A metallic island connected to a source and a drain through tunnel junctions exceeding the Klitzing resistance and under the influence of a gate electric field constitutes a Single-Electron Transistor (SET) Averin . The charging energy of the island by a single electron writes where is the total capacitance of the island. It defines the temperature and bias thresholds below which single-electron physics appears. In the regime where charge transport is governed by unscreened Coulomb interactions, the question of the associated heat flow has been addressed by several theoretical studies PRB-Beenakker ; Boese2001 ; PRB-Taring ; PRB-Kubala ; Tsaousidou2006 ; Zianni2007 ; PRL-Kubala ; PRB-Rodionov . The Wiedemann-Franz law is expected to hold in an SET only at the charge degeneracy points in the limit of small transparency, where the effective transport channel is free from interactions, and is violated otherwise.
In this Letter, we report on the measurements of both the heat and charge conduction through a metallic SET, with both quantities displaying a marked gate modulation. A strong deviation from the Wiedemann-Franz law is observed when the transport through the SET is driven by the Coulomb blockade, as the electrons flowing through the device are then filtered based on their energy.
Figure 1a is a colored scanning electron micrograph of one of the devices that we have investigated while Fig. 1b shows a schematics with the same colors for every element. It includes an SET with a drain made of a bulky electrode that is well thermalized to the bath. In contrast, the source of the SET is connected to its lead through a direct Normal metal-Superconductor (NS) contact, which thermally isolates it due to poor thermal conductivity of a superconductor at low temperature. In addition, four superconducting contacts form Superconductor-Insulator-Normal metal (SIN) junctions. As will be discussed below, the latter can be used either as electronic thermometers or coolers/heaters. Samples were fabricated by three-angle evaporation of Cu (30-45 nm), Al (20 nm) and again Cu (30 nm) SuppMat . The Al layer was oxidized in order to form tunnel barriers with the second Cu layer. Still, the drain, island and source are in the normal state as the SET tunnel junctions are based on a short Al strip rendered normal by inverse proximity effect via a clean contact to a long normal (Cu) line koski11 . The SET island was designed with a small volume in order to render the electron-phonon coupling negligible in the island.
We report here on two investigated devices with identical geometry but different drain-source tunnel resistance of 164 k (sample A) and 52 k (sample B). Figure 1d shows the differential conductance at 50 mK as a function of both the SET bias and the average number of electrons induced electrostatically by the gate potential on the island. Here is the capacitance between the gate and the island. Coulomb diamonds (in dark blue) are regions of zero current through the SET. Every diamond is centered around an integer value of and defines a fixed charge state on the island. At zero bias, the charge conductance is thus vanishing, except in the vicinity of the degeneracy points at half-integer values of . At these points, two charge states have the same energy and the conductance (for small barrier transparency) is half the high-temperature value, which is related to the fact that only these two states are involved. From the map, one can estimate a charging energy of about 155 and 100 eV for sample A and B, respectively.
In the present work, our approach is to study the thermal balance in the source when it is heated or cooled. In every thermal measurement, we ensured that no current is flowing through the SET, so that pure heat transport can be considered. The thermal conductance of the SET is inferred from the heat balance in the source, and then compared to the electrical conductance measured in parallel.
We will consider here that the electron population of the source is in quasi-equilibrium at a well-defined (electronic) temperature . This is justified as the mean electron escape time from this element is longer than the estimated electron-electron interaction time PRL97-Pothier . By heating or cooling electrons in the source, its electronic temperature can be different from the temperature of the phonons thermalized at the bath temperature . We achieve electronic thermometry by measuring the voltage drop across a current-biased NIS junction giazotto06 ; APL93-Nahum ; PRApp-Feshchenko , the current set-point being chosen to be low enough in the sub-gap regime (, being the energy gap of the superconductor) to avoid any significant cooling.
Indeed, a current bias through a (pair of) NIS junction enables to cool electrons with respect to the phonons APL95-Nahum ; RPP-Muhonen . This can be understood as a kind of selective evaporation: when the voltage drop is below the energy gap, only higher energy electrons can escape the normal metal. The maximum cooling power is obtained right below the gap in terms of voltage drop across one NIS junction. At a larger voltage, the usual Joule heating is recovered and electrons are heated above the thermal bath temperature.
The cooling and heating of the source electronic bath is illustrated for sample B in Fig. 2 left. Here one NIS junction to the source is used for thermometry while a second junction acts as a cooler used for cooling/heating. At a low cooler bias , the electronic temperature is below the bath temperature of 152 mK (indicated by a horizontal dashed line in Fig. 2 left) so that cooling is achieved. The maximum temperature reduction of about 50 mK is reached at a potential drop of about 190 eV, close to the gap for Al. A larger cooling is obtained when the gate potential is adjusted so that electron transport through the SET is blocked () and so is thermal transport through it. At higher bias of the cooler (), an electron overheating is obtained: . Again, the electron temperature change (here an increase) is larger when the SET is blocked. The electron temperature at a fixed cooler bias but as a function of the gate potential is displayed in Fig. 2 right. Clear temperature oscillations are obtained, with an opposite sign for the electron cooling and the over-heating regimes. This demonstrates the contribution of the thermal conductance of the SET to heat transport.
In order to quantify the thermal conductance through the SET, we describe the thermal balance in the source following a thermal model depicted in Fig. 1b. In this model, the electron bath in the source receives the power from the cooler junction, with a positive or negative sign corresponding to cooling or heating respectively. It can be calculated from giazotto06 , where is the tunnel junction resistance of the cooler, is the (BCS) density of states of the superconductor, is the thermal energy distribution function in the source or the S lead of the cooler at respective temperatures and . The parasitic power takes into account imperfect thermalization of the electrical connections. The main energy relaxation channel for the source electrons is the coupling to phonons, with a power following , where is characteristic of the material, is the volume, and is the phonon temperature here assumed to be equal the bath temperature giazotto06 . Eventually, the SET transmits a power to the source.
Let us first consider the gate-open position = 0.5, where the two charge states involved in electron transport have the same electrostatic energy. Electron transport is thus (for small barrier transparency) unaffected by electron interaction and the Wiedemann-Franz law is expected to be valid. The power can thus be calculated from the measured differential conductance for charge at low bias. We use the thermal balance for the source electrons to extract the cooling/heating power . Here the electron-phonon coupling power is calculated using the actual volume and a parameter value: = 2.8 nWmK*-5*, close to the expected value for Cu arxivVilsanen . The parasitic power is found to be 0.1 fW in agreement with previous works Meschke2006 . From the values of and taking into account the measured electronic temperature, the imposed cooler voltage, and the Al energy gap, one extracts the superconducting lead temperature as a function the bias of the cooler. Values, obtained for this temperature , up to 450 mK SuppMat are in line with expectations in a device where no specific care was put for proper quasiparticle evacuation NJP-Hung .
The preceding analysis at the gate open state provides us with a full knowledge of the thermal behavior of the source, including all physical parameters for electronic cooling and electron-phonon coupling. We now assume that, whatever the gate potential is, the temperature of the superconducting leads of the cooler varies with the cooler’s bias as determined above in the gate open case. The measured values of the source electronic temperature are used to calculate the power flowing through the SET as as a function of . Considering the limit of a small temperature difference, the SET heat conductance is then calculated as .
Figure 3a shows both the heat conductance and the charge conductance for samples A and B, as a function of the gate potential. Both quantities were measured at the same bath temperature. An SET bias of about 20 V and an electron cooling by about 25 mK were used for the charge and the heat transport measurements respectively. The charge conductance is plotted in units of the low-bias gate-open conductance . The heat conductance is plotted in units of the Wiedemann-Franz value in the gate-open state . The mean temperature is here averaged over the range of induced charge = 0 to 1. Using here makes that a linear response is expected in the Wiedemann-Franz regime even for the case of a significant temperature difference SuppMat .
For both samples A and B, the charge conductance oscillates with . In the case of sample A (top left), the charge and heat conductances mostly overlap over the full gate potential range. Close to the gate-closed state, the two conductances seem to deviate one from the other but their absolute values are small. In contrast, sample B exhibits a clear deviation from the Wiedemann-Franz law. At the gate closed state, the heat conductance clearly exceeds the charge conductance multiplied by .
In order to get more insight, let us now consider the Lorenz factor defined as with . The Wiedemann-Franz law sets a Lorenz factor equal to unity. In contrast, for sample B the Lorenz factor (Fig. 3 bottom right) oscillates between 1 at gate-open state and about 4 at gate closed state. This is the main result of this work. Sample A shows essentially the same behavior over the gate potential range where it can be accurately determined whereas error bars are very large in the vicinity of the gate-closed state due to vanishingly small conductances. We obtained similar results for the whole range of bias points of the cooler, both in the cooling and the heating regimes SuppMat .
The physical origin of the violation of the Wiedemann-Franz law resides in the energy selectivity of electron transport through an SET. As a consequence of this, the population of electrons flowing through the SET is non-thermal. For instance, at the gate-closed state, only electrons with an energy (counted from the Fermi level) above the charging energy contribute to the zero-bias SET conductance. These electrons obviously carry the same (electron) charge but a higher energy. Thus the heat conductance does not decay due to interactions as much as the charge conductance does and the Lorenz number exceeds its basic usual value . Electron co-tunneling can counter-balance this, as it involves electrons with an energy close to the Fermi level. The cross-over to the co-tunneling regime shows up at the gate-closed state as a maximum of the Lorenz factor at a temperature PRL-Kubala .
We have calculated the theoretical Lorenz factor for our samples using the theory of Ref. PRL-Kubala . Figure 3 bottom shows as full lines the calculated Lorenz factor in parallel with the experimental data. As for parameters, we used the calculated values of 0.06 and 0.12 for sample A and B respectively and the measured values of the SETs conductance. The theoretical prediction and the experimental data match very well, within error bars. For sample A, the calculated Lorenz number shows a relative minimum in the gate-closed state, which cannot be checked in the experiment due to experimental uncertainties.
Further, we investigated the power flowing through the SET beyond the regime of small temperature differences. In the linear regime, the thermal conductance is proportional to temperature, leading to the quadratic dependence of the heat power on the source () and drain () temperatures: . Figure 4 compares experimental data (dots) covering both the cooling and the heating regimes to the latter law, on a log-log plot. In the gate-open case = 0.5, slope is 1 as assumed in the calibration. Away from the gate-open state, a larger slope is obtained, up to 1.14 at = 0. Further theoretical work is needed to compare this observation to theoretical predictions.
In conclusion, we have demonstrated that the heat transport through an SET can be driven by a gate potential, making the SET a heat switch. The celebrated Wiedemann-Franz law is strongly violated away from the charge degeneracy positions. Our experimental data agrees very well with theoretical predictions. As a prospect, investigating SETs where the island is a quantum dot could exhibit new thermo-electric effects driven by a single energy level PRL-VanZanten .
B. D. and J. T. P. contributed equally to this work. We acknowledge financial support from the Nanosciences Fundation, Grenoble. We acknowledge the availability of the facilities and technical support by Otaniemi research infrastructure for Micro and Nanotechnologies (OtaNano). We acknowledge financial support from the Academy of Finland (Projects 272218, 284594 and 275167).
I Sample fabrication
The SET samples are fabricated using a process closely related to the one described in Ref. peltonen15, , relying on two rounds of electron beam lithography (EBL) and subsequent metal depositions. The substrate is a p-doped (resistivity ), single-side polished 4” Si wafer with thermal oxide grown on both sides.
In the first lithography round, a large-area continuous ground plane electrode is patterned and subsequently metallized in an electron beam evaporator as a stack of Ti () / Au () / Ti (). After liftoff, the full wafer is coated with an approximately thick insulating layer of , grown by atomic layer deposition (ALD). The ground plane electrode starts approximately away from the SET junctions and the NIS probes [not visible in Fig. 1 ]. Overlap of the SET and NIS probe leads, defined in the second lithography step, with this ground plane electrode forms an efficient on-chip filter against residual microwave-frequency noise pekola10 . The two thin Ti layers help with adhesion to the substrate and the initial growth of the dielectric.
Following the ALD growth, a suspended Ge-based hard mask is prepared for the main EBL step where all the structures shown in Fig. 1 are defined. The total thickness of the mask is typically , whereas the e-beam deposited Ge layer is only thick, making it possible to optimize the lithography and development steps for reliable formation of the small tunnel junctions. The sacrificial layer under Ge is formed by a spin-coated layer of P(MMA–MAA) copolymer. Immediately after the multi-step dry development process by reactive ion etching (RIE) in and plasmas, the sample is loaded into an evaporator equipped with a tiltable sample holder. This allows fabricating both the normal-metal SET and the NIS probes using the same mask and in a single vacuum cycle. The SET is realized using an adaptation of the technique introduced in Ref. supp-koski11, as discussed in the following.
First, a () thick film of Cu is deposited for sample A (B) with the sample holder set to normal incidence with respect to the evaporation source. As indicated in Fig. 1a, this initial Cu layer forms the SET drain lead as well as the main part of the source electrode. This is immediately followed by the evaporation of a layer of Al. For this deposition, the sample holder is now tilted to an angle close to , resulting in an effectively close to thick, downwards [in the orientation of Figs. 1and S1] shifted Al copy of the mask pattern. The Al layer forms the two, sub- long dots, connected to the source and drain Cu regions with transparent metal-to-metal contacts. As observed in Ref. supp-koski11, , the Al pieces, with length comparable to the superconducting coherence length, are driven normal due to strong inverse proximity effect from the Cu electrodes. As evident from Fig. 1 , the same Al deposition also forms the S electrodes of the NIS thermometer and cooler/heater [colored light blue in Figs. 1 and ]. To form the tunnel barriers for the SET and NIS probe tunnel junctions, the Al layer is subjected to in-situ static oxidation immediately after the deposition is completed. This is accomplished by letting typically of oxygen into the deposition chamber for the duration of .
To complete the fabrication, a second layer of Cu is evaporated with the sample now tilted in the opposite direction compared to the preceding Al deposition. This upwards-shifted copy of the mask pattern forms the SET island [yellow in Figs. 1 –] as well as the N electrode of the NIS probes. As a result of the three-angle evaporation through the same mask, three projections of the complete mask pattern will be formed on the substrate. The irrelevant, partially overlapping shadow copies of the various structures, evident in Figs. 1 and , are shown uncolored in gray.
II Sample design
The length of the narrow and fully superconducting source electrode, i.e., the region where it is not overlapped by the Cu structures and is therefore completely unaffected by the inverse proximity effect, is approximately . At electronic temperatures up to about , this is sufficient for very good thermal isolation of the SET source close to the tunnel junctions peltonen10 .
The source is made of three Cu elements in series, made of two distinct layers, see Fig. 1(a). The Cu–Cu contacts between these elements have low electrical and thermal resistance, as the first Cu film is not significantly oxidized during the formation of the in-situ tunnel barriers. Therefore, no thermal gradient will develop between the three Cu islands forming the normal-conducting part of the SET source electrode.
We note that in the present work the deposition order for the SET junctions differs from Ref. supp-koski11, . Instead of depositing the Al first, followed immediately by Cu in direct contact, and only then oxidizing the Al, we now start with Cu as detailed above. This reversed order for forming the transparent Al-Cu contact allows better experimental control over the tunnel junction transparencies.
III SET characterization
To model the thermal transport properties of the SET, we need to estimate the charging energy and the tunneling resistance . Assuming symmetric junctions with identical resistances , a straightforward and reliable way to obtain them is to make a fit to the measured minimum and maximum current at each bias voltage . An example of such calculated envelope curves at , corresponding to at and at , is included in Fig. S2 for sample B. From this procedure, performed at several bath temperatures , we estimate and for sample A, and for sample B. For an improved estimate of , we include self-heating at finite currents and solve the SET source temperature consistently from the thermal balance equation.
IV NIS thermometer and cooler characterization
Here we show how the main parameters that describe the NIS junction cooler current and its cooling power were estimated. These include the normal state tunnel resistance , low-temperature superconducting energy gap , and the dimensionless Dynes broadening parameter . To this end, we fit the measured NIS junction IV characteristic using Rajauria07 :
[TABLE]
showing explicitly that , and that depends directly only on the electronic temperature of the SET source electrode. We include the -dependence of via a basic thermal balance.
The low-temperature IV characteristic of the NIS cooler junction of sample B is included in Fig. S3, both on linear and logarithmic scale, together with the calculated . For this sample we obtain , , and . When compared to effects caused by the overheating of the superconducting electrode, the exact value of or other subgap features of the I–V curve do not play a significant role in modeling the cooling power of the NIS junction at voltages close to .
V Heat balance
As a simplification for SETs with high normal state resistance, we assume that fulfills the Wiedemann-Franz law at (“gate open”). We then model the actual cooling power of the NIS junction by using an elevated , caused by the injection of non-equilibrium quasiparticles at . At , the superconductor temperature shows values , cf. Fig. S4. The order of magnitude of the appears realistic when compared to experiments in similar structures PRB-Rajauria . Such a consistent behavior is obtained for bath temperatures up to 300 mK where thermal leakage through the superconducting lead of the source starts to contribute significantly.
Once the elevated has been extracted in the above manner, we can use it as well as the measured , to extract from the heat balance. Notably, this procedure is independent of the model for the SET heat flows – it rests only on the assumption that fulfills the Wiedemann-Franz law.
In the linear regime, the thermal conductance is proportional to temperature: . If one considers a temperature drop between and , one obtains:
[TABLE]
where . Considering the Wiedemann-Franz value for the thermal conductance at the average temperature then enables one to obtain a linear behavior.
VI Additional experimental material
The analysis displayed in Fig. 3 of the main paper can be performed also in the heating regime, see Fig. S5. In that case, the temperature difference is large, preventing a direct analysis of the power through the SET in terms of thermal conductance. It is then particularly important to use in the calculation of the Lorenz factor, the temperature that is the average between the cold side (the bath temperature) and the hot side (the mean electron temperature). It shows a very good agreement with the behavior observed in main paper Fig. 3.
Figure S6 displays an example of the gate dependence of both the electron-phonon power and the power flowing through the SET. It is observed that the power flow through the SET can represent about 30 of the total power flow at 150 mK.
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