Superconducting qubits on silicon substrates for quantum device integration

TL;DR

This paper demonstrates the fabrication and characterization of superconducting transmon qubits on silicon substrates, achieving coherence times comparable to sapphire, and enabling potential integration with silicon photonics for quantum networking.

Contribution

It introduces a novel fabrication process for superconducting qubits on silicon substrates, including SOI, facilitating integration with silicon photonic and mechanical components.

Findings

Qubit lifetimes up to 27 microseconds on silicon substrates.

Coherence times comparable to sapphire-based qubits.

Process enables integration with silicon photonics for quantum devices.

Abstract

We present the fabrication and characterization of transmon qubits formed from aluminum Josephson junctions on two different silicon-based substrates: (i) high-resistivity silicon (Si) and (ii) silicon-on-insulator (SOI). Key to the qubit fabrication process is the use of an anhydrous hydrofluoric vapor process which removes silicon surface oxides without attacking aluminum, and in the case of SOI substrates, selectively removes the lossy buried oxide underneath the qubit region. For qubits with a transition frequency of approximately $5$GHz we find qubit lifetimes and coherence times comparable to those attainable on sapphire substrates ($T_{1,\text{Si}} = 27\mu$s, $T_{2,\text{Si}} = 6.6\mu$s; $T_{1,\text{SOI}} = 3.5\mu$s, $T_{2,\text{SOI}} = 2.2\mu$s). This qubit fabrication process in principle permits co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits.

Figures

Full text

Superconducting qubits, silicon, silicon-on-insulator, device integration, quantum computing

In recent years, significant developments in experimental quantum information science Devoret and Schoelkopf (2013); Houck et al. (2012) have been realized using microwave superconducting qubit hardware. These devices, consisting of Josephson junctions (JJs) and linear circuit elements, are typically coupled to high-$Q$ superconducting microwave cavities, which realizes the microwave analog of cavity QED—so-called circuit QED Blais et al. (2005, 2007); Devoret et al. (2007). The advent of the transmon qubit Koch et al. (2007); Schreier et al. (2008); Houck et al. (2009) has provided a robust and scalable circuit QED building block. Leveraging small mode volumes and large vacuum coupling rates, circuit QED systems have been put into the regime of strong coupling, Wallraff et al. (2004); Devoret et al. (2007) realized state-of-the-art gate fidelities, Barends et al. (2014) and utilized to perform quantum error detection and correction. Reed et al. (2014); Ofek et al. (2016)

Interfacing the circuit QED toolbox with other systems of physical or technological interest – cavity optomechanical systems, for example Safavi-Naeini and Painter (2011); Andrews et al. (2014) – requires scalable fabrication techniques on compatible materials systems. Much work within the circuit QED community has focused on developing fabrication methods that realize long qubit lifetimes and small dephasing rates Quintana et al. (2014); Wang et al. (2015); McDermott (2009). Owing to sapphire’s good microwave properties, this work has primarily utilized the aluminum-on-sapphire (AOS) materials system. Using the AOS material system two primary approaches have emerged: the so-called planar approach wherein qubits are coupled to on-chip resonators Barends et al. (2013) and the 3D cavity approach wherein qubits are coupled to 3D box cavities Axline et al. (2016). Whereas the former affords higher device densities and more integration, the latter yields longer coherence times.

Here, we demonstrate scalable fabrication techniques for planar silicon-based superconducting circuits O’Connell et al. (2008); Weber et al. (2011); Bruno et al. (2015) that obtain similar transmon qubit coherence times and gate fidelities as their planar sapphire counterparts Barends et al. (2013, 2014). We note that similar work has recently been performed with silicon-based qubits in the context of 3D cavities Chu et al. (2016). Additionally, we present the fabrication and characterization of a superconducting qubit on silicon-on-insulator (SOI) with a coherence time which is a factor of $20$ improvement over prior work in this material system Patel et al. (2013). These SOI qubit fabrication methods not only realize high quality qubits, but are also compatible with the integration of other photonic, electronic, and MEMS components on the same SOI substrate.

Our qubit design (pictured in Fig. 1(b), and shown schematically in Fig. 2(c)) is based on the Xmon qubit. Barends et al. (2013) In both our high-resistivity silicon (Si) and SOI devices, a long rectangular capacitor is capacitively coupled to both a readout resonator and an XY-control line; the capacitor is connected to ground through a SQUID loop (Fig. 1(c)) that is inductively coupled to a DC control line, which allows for frequency tuning of the qubit. Barends et al. (2013) Our readout resonator, consisting of a $\lambda/4$ coplanar waveguide resonator, is inductively coupled to a transmission line, which allows for dispersive readout of the qubit. Barends et al. (2013) We realize (Si, SOI) as-measured parameters of: $f_{q}=\omega_{q}/2\pi=(4.962,5.652)$ GHz, $\eta/2\pi=(-260,-300)$ MHz, $\omega_{r}/2\pi=(6.868,7.143)$ GHz, and $\chi/2\pi=(1.2,3.5)$ MHz, where $\omega_{q}=\omega_{10}$ is the qubit transition frequency, $\eta=(\omega_{21}-\omega_{10})$ is the anharmonicity, $\omega_{r}$ is the readout resonator frequency, and $2\chi=\omega_{r,|0\rangle}-\omega_{r,|1\rangle}$ is the dispersive shift. These measured values imply a Josephson energy $E_{J}/h=(13.1,14.8)$ GHz in the transmon limit ($E_{J}\gg E_{C}$) where $\hbar\omega_{q}\approx\sqrt{8E_{J}E_{C}}-E_{C}$ and the charging energy $E_{C}\approx-\hbar\eta$, as well as a vacuum qubit-resonator coupling rate $g/2\pi=(135,177)$ MHz where $g\approx\sqrt{-\Delta\chi(1+\Delta/\eta)}$ and $\Delta=\omega_{q}-\omega_{r}$. Our readout resonators have intrinsic and extrinsic coupling $Q$s of $Q_{i}=(5.8,45.8)\times 10^{3}$ and $Q_{e}=(12.9,6.1)\times 10^{3}$, respectively, measured at single-digit intracavity photon numbers. These values are close to the designed and expected values, except for the intrinsic $Q_{i}$ of the read-out resonator on Si. This value is more then two-orders of magnitude smaller than expected from previous resonator-only tests we have performed on Si. Evidence of frequency jitter in the read-out resonator of this sample was observed, which may explain an under-estimate of the $Q_{i}$ from the swept frequency measurement used here.

Our fabrication process is a multi-layer process pictured in Fig. 1(a). We begin with a 10 mm $\times$ 10 mm chip of either Si [Float zone (FZ) grown, $525$ $\mu$m thickness, $>10$ kOhm-cm resistivity] or SOI [Si device layer: FZ grown, $220$ nm, $\gtrsim 3$ kOhm-cm; BOX layer: $3$ $\mu$m, silicon dioxide; Si handle: Czochralski grown, $750$ $\mu$m, $\gtrsim 5$ kOhm-cm]. We then perform the following main fabrication steps (from left to right in Fig. 1(a)): (i) C4F8/SF6 inductively coupled plasma reactive ion etch (ICP-RIE) of $50$ nm radius holes through the device layer to allow for release in step (v) below; (ii) electron beam evaporation of $120$ nm Al at $1$ nm/s to define a ground plane, the qubit capacitor, and the readout resonator; (iii) double-angle electron beam evaporation of $60$ nm and $120$ nm of Al at $1$ nm/s with an intervening $20$ minute oxidation at $5$ mbar and subsequent $2$ minute oxidation at $10$ mbar to forms the JJs; (iv) $5$ minute argon ion mill and $140$ nm Al evaporation to form a “bandage” layer that electrically contacts the Al layers defined in step (ii) and (iii); (v) HF vapor etch of the underlying BOX layer.

After steps (ii-iv), a liftoff process was performed in n-methyl-2-pyrrolidone at $80$ *∘*C for two hours. Steps (i) and (v) are omitted for Si devices as they do not require a release. In (i-iv), we use electron beam lithography to pattern our resist. The above process is similar to that described elsewhere Dieterle et al. (2016); Megrant et al. (L482) and, for SOI samples, yields a device layer that is partially suspended above the handle wafer. As highlighted by the yellow boundary line in the scanning electron microscope image of Fig. 1(b), we etch $100$ $\mu$m into the BOX layer such that the circuit is far from the lossy Si/SiO2 interface. Dieterle et al. (2016)

We characterize each qubit in a 3He/4He dry dilution refrigerator with base temperature of $T_{f}\sim 7$ mK using frequency-domain and time-domain spectroscopy. We begin with frequency-domain characterization and measure transmission ($S_{21}$) through a coplanar waveguide feedline using a two-port vector network analyzer (VNA). The Z control line is used to carry a small current which produces an external flux bias, $\Phi_{\rm ext}$, in the SQUID loop of the qubit, thereby tuning the qubit transition frequency, $f_{q}$. For a given $\Phi_{\rm ext}$, we identify $f_{q}$ and transitions to higher levels (from which we extract $\eta$) by sweeping a continuous-wave (CW) microwave tone applied to the XY drive line and monitoring the resonator response. Fink (2010)

Having identified device parameters, we switch over to time-domain characterization, using the measurement setup summarized in Fig. 2 (for details see App. A). We characterize each qubit using dispersive readout Schuster et al. (2005) (Fig. 3) with $\Phi_{\rm ext}$ set so that the qubit is at a first-order flux-insensitive point. Koch et al. (2007); Barends et al. (2013) In this projective readout scheme, a sample from one of two distributions in the I-Q plane is measured depending on whether the qubit is projected into the ground or excited state. We make a binary discrimination for each single measurement of an arbitrary pulse sequence ($1$ for excited qubit state $|1\rangle$, or [math] for ground qubit state $|0\rangle$), and average at least $10^{4}$ such values to determine excited state population. The sub-unity visibility (e.g., see Fig. 3(e,f)) primarily reflects imperfect readout fidelity for both Si and SOI devices. rea

To characterize our gate fidelities, we utilized Clifford group randomized benchmarking, Chow et al. (2009); Magesan et al. (2012); Barends et al. (2014) shown schematically in Fig. 4(a,b). For the Si sample Fig. 4(c), we measured two gates ($X_{\pi/2}$ and $X_{\pi}$) while for SOI (Fig. 4(d)), we measured three ($X_{\pi}$, $X_{\pi/2}$, and $Y_{\pi}$). We realize average gate fidelities of $\mathrm{bar}{f}(C)=0.9952(5)$ on Si and $0.9860(2)$ on SOI as well as individual gate fidelities of $>0.992$ for all measured gates on Si and SOI. It should be noted that these gates have not yet been optimized to avoid phase errors or leakage outside the computational basis Motzoi et al. (2009).

Our measurement of $T_{1,\text{Si}}=$ 27 $\mu$s for our Si qubit is noteworthy, especially given the simplicity of our design and fabrication process. We can estimate the Purcell-limited $T_{1}$ by the simplistic single-mode estimate $(\Delta/g)^{2}/\kappa_{r}$, where $\kappa_{r}=\omega_{r}/Q$ and $1/Q=1/Q_{i}+1/Q_{e}$. This yields 18.5 $\mu$s (8.5 $\mu$s) for the Si (SOI) qubit of this work, implying that: (i) the estimate is inaccurate, since we measure a larger-than-estimated $T_{1}$ for Si (a more conservative estimate which assumes we are indeed under-estimating $Q_{i}$ due to frequency jitter and takes $Q\approx Q_{e}$, yields a Purcell-limited $T_{1}$ of 57 $\mu$s), and (ii) incorporating an on-chip Purcell filter may well improve our qubit lifetimes. Reed et al. (2010); Jeffrey et al. (2014) Also, regarding the measured $T_{2}$ values, since obtaining these measurements we have identified and resolved some grounding issues in our measurement setup that likely contributed to excess flux noise coming from $60$ Hz currents on our flux bias line. We anticipate that these improvements may even be important at the first-order flux insensitive point.

In terms of the impact of the SOI device layer properties or various fabrication steps on the resulting qubit decoherence times, further systematic studies are required. In particular, the importance of using the vapor HF etch to remove native oxides and (temporarily) passivate the Si surface before every evaporation step of aluminum on the Si layer (including right before the double angle evaporation used to form the JJs), needs to be clarified further. Also, any residual effects of the underlying BOX layer needs to be ruled out through systematic studies of qubit coherence versus undercut extent, in conjunction with 3D numerical modeling to determine more optimized qubit and membrane geometries. Even while the precise physical and materials limitations of our system are unclear, current coherence times are sufficient for many quantum simulation and quantum optics experiments. Meanwhile, our realization of a highly coherent SOI qubit represents an essential building block for hybrid electro-opto-mechanical systems on SOI. Already, electromechanical and optomechanical coherent transduction bandwidths exceed the bandwidth of our qubit by a factor of two Andrews et al. (2014); Dieterle et al. (2016); Witmer et al. (2016), a prerequisite for high-fidelity, bi-directional microwave-to-optical quantum state transduction—an interesting and challenging research program in its own right, with many potential realizations.

Overall, our fabrication and measurements of planar qubits on silicon and SOI represent a modest but important technical stepping stone on the path to a variety of potential quantum information and quantum science goals. Taken together with complementary advances in the fields of cavity opto- and electro-mechanics Aspelmeyer et al. (2014); Andrews et al. (2014), and in the context of competing systems Chu et al. (2016); Barends et al. (2013), we are optimistic about the potential for hybrid quantum systems and circuit QED on silicon and silicon-on-insulator platforms.

Acknowledgments

We gratefully acknowledge the Martinis Group (UCSB/Google) for their amplifier and filter designs as well as Dan Vestyck at SPTS for his support of our uEtch HF vapor tool. This work was supported by the AFOSR MURI Quantum Photonic Matter (grant 16RT0696), the AFOSR MURI Wiring Quantum Networks with Mechanical Transducers (grant FA9550-15-1-0015), the Institute for Quantum Information and Matter, an NSF Physics Frontiers Center (grant PHY-1125565) with support of the Gordon and Betty Moore Foundation, and the Kavli Nanoscience Institute at Caltech. A.J.K. acknowledges an IQIM Postdoctoral Fellowship.

Appendix A Measurement setup

A Tektronix AWG5014C arbitrary waveform generator (AWG) generates shaped in-phase (I) and quadrature (Q) pulses at IF $=100$ MHz for both qubit readout and XY drive. Each output of the AWG passes through its own home-made dissipative Gaussian filter with 320 MHz cutoff. The waveforms are each amplified with a home-made differential amplifier and passed to the I and Q ports of IQ mixers (Marki IQ-0307MXP for the XY drive, IQ-0409MXP for readout). Carrier tones are supplied by CW microwave sources (Rohde & Schwarz SMB100A) to the local oscillator (LO) ports of the mixers. As a result, the readout and XY pulses are single-sideband-upconverted to microwave frequencies. We attenuate and filter these signals at several temperature stages of a cryogen-free dilution refrigerator.

Flux biasing is provided by a programmable DC source (Yokogawa GS200) which is filtered at 4 K (Therma-uD-25G from Aivon Oy, Helsinki, Finland) and again at the mixing chamber plate with a reflective microwave filter (Minicircuits).

The DC and AC signals reach the device, which is mounted on a gold-plated PCB inside a copper box inside two concentric magnetic shields (Magnetic Shields Ltd., Staplehurst, UK) consisting of 1.5 mm thick Cryophy material heat-treated to MSL1154-HTC specification. The inner shield is 51mm ID by 168mm high and the outer shield is 67mm ID by 185mm high. The copper box and magnetic shields are mounted to a copper coldfinger attached to the mixing chamber plate. A shield on the mixing chamber is painted in an infrared-absorbing carbon/silica/epoxy mixture to minimize quasiparticle generation in the aluminum. Barends et al. (2011); Córcoles et al. (2011)

The output is protected from room-temperature noise by two circulators (Raditek RADC-4-8-Cryo-0.02-4K-S23-1WR-b) and at 4 K, a HEMT (Low Noise Factory LNF-LNC4_8C) amplifies by 42 dB, with 68 dB further amplification at room temperature. We used two room-temperature power amplifiers, a Miteq AFS42-00101200-22-10P-42 with 50 dB of gain and a home-made amplifier with 18 dB of gain designed by the Martinis group. The readout signal is then downconverted and the resulting I and Q are simultaneously digitized using a 1GS/s 2-channel PCIe digitizer (AlazarTech ATS9870). In software, the I and Q are mixed with 100 MHz tones to yield a single point in the I-Q plane for a single readout pulse.

The semirigid coaxial cable in our fridge is stainless-stainless .085” above the 4 K plate and NbTi-NbTi .085” below.

Appendix B Randomized benchmarking

In Clifford group randomized benchmarking protocols, Magesan et al. (2012); Barends et al. (2014); Chow et al. (2009) a qubit initialized in its ground state has $2N$ gates performed on it—$N$ random gates from the Clifford group (labeled $C_{i}$) interleaved with $N$ of the same Clifford gate (e.g., $X_{\pi}$). After application of all $2N$ gates, we perform the Clifford gate that puts the qubit in its excited state (labeled $C_{|1\rangle}$) and read out the qubit state. The probability of being in the excited state as a function of $N$, is then compared against the same procedure, but without $N$ of the same interleaved gate. This procedure yields two exponentials of the form $c_{1}+c_{2}p^{N}$, the latter with depolarizing parameter $\mathrm{bar}{p}$ and the former with depolarizing parameter $p_{G}$. These two parameters are related to the average Clifford group gate fidelity, $\mathrm{bar}{f}(C)$, and gate fidelity of interest, $f(G)$, through $\mathrm{bar}{f}(C)=1-\frac{1-\mathrm{bar}{p}}{2}$ and $f(G)=1-\frac{1-p_{G}/\mathrm{bar}{p}}{2}$. Magesan et al. (2012) For the data presented in Fig. 4, we performed 20000 measurements on 40 (50) random Clifford group sequences on Si (SOI).