A/D Converter Architectures for Energy-Efficient Vision Processor

TL;DR

This paper compares various ADC architectures for energy-efficient vision processors, proposing a design that balances high performance with low power consumption to enhance AI-driven computer vision applications.

Contribution

It introduces a novel ADC architecture tailored for energy-efficient vision processing, addressing the need for high performance and low power in AI applications.

Findings

Proposed ADC design achieves low power consumption.

Compared ADC architectures for energy efficiency.

Demonstrated improved performance in vision processors.

Abstract

AI applications have emerged in current world. Among AI applications, computer-vision (CV) related applications have attracted high interest. Hardware implementation of CV processors necessitates a high performance but low-power image detector. The key to energy-efficiency work lies in analog-digital converting, where output of imaging detectors is transferred to digital domain and CV algorithms can be performed on data. In this paper, analog-digital converter architectures are compared, and an example ADC design is proposed which achieves both good performance and low power consumption.