Another Look at the Implementation of Read/write Registers in Crash-prone Asynchronous Message-Passing Systems (Extended Version)

TL;DR

This paper introduces SCD-broadcast, a new communication abstraction that simplifies implementing read/write registers in crash-prone asynchronous message-passing systems by capturing essential communication properties.

Contribution

It defines SCD-broadcast, shows its equivalence to snapshot objects, and demonstrates its implementation under minimal crash assumptions.

Findings

SCD-broadcast enables simple snapshot object implementation.

SCD-broadcast is computationally equivalent to snapshot objects.

SCD-broadcast can be implemented with minimal crash assumptions.

Abstract

" Yet another paper on " the implementation of read/write registers in crash-prone asynchronous message-passing systems! Yes..., but, differently from its predecessors, this paper looks for a communication abstraction which captures the essence of such an implementation in the same sense that total order broadcast can be associated with consensus, or message causal delivery can be associated with causal read/write registers. To this end, the paper introduces a new communication abstraction, named SCD-broadcast (SCD standing for " Set Constrained Delivery "), which, instead of a single message, delivers to processes sets of messages (whose size can be arbitrary), such that the sequences of message sets delivered to any two processes satisfies some constraints. The paper then shows that: (a) SCD-broadcast allows for a very simple implementation of a snapshot object (and consequently also of atomic read/write registers) in crash-prone asynchronous message-passing systems, (b) SCD-broadcast can be built from snapshot objects (hence SCD-broadcast and snapshot objects --or read/write registers-- are " computationally equivalent "), (c) SCD-broadcast can be built in message-passing systems where any minority of processes may crash (which is the weakest assumption on the number of possible process crashes needed to implement a read/write register).