DyAdHyTM: A Low Overhead Dynamically Adaptive Hybrid Transactional Memory on Big Data Graphs

TL;DR

This paper introduces DyAdHyTM, a low-overhead, dynamically adaptive hybrid transactional memory system that combines hardware and software approaches to improve performance in big data graph applications on shared memory systems.

Contribution

It proposes a novel hybrid TM scheme that adaptively combines hardware and software transactional memory to optimize performance for big data graph processing.

Findings

Outperforms coarse-grain lock by up to 8.12x

Surpasses low-overhead STM by up to 2.68x

Exceeds other hybrid TMs by up to 1.55x

Abstract

Big data is a buzzword used to describe massive volumes of data that provides opportunities of exploring new insights through data analytics. However, big data is mostly structured but can be semi-structured or unstructured. It is normally so large that it is not only difficult but also slow to process using traditional computing systems. One of the solutions is to format the data as graph data structures and process them on shared memory architecture to use fast and novel policies such as transactional memory. In most graph applications in big data type problems such as bioinformatics, social networks, and cyber security, graphs are sparse in nature. Due to this sparsity, we have the opportunity to use Transactional Memory (TM) as the synchronization policy for critical sections to speedup applications. At low conflict probability TM performs better than most synchronization policies due to its inherent non-blocking characteristics. TM can be implemented in Software, Hardware or a combination of both. However, hardware TM implementations are fast but limited by scarce hardware resources while software implementations have high overheads which can degrade performance. In this paper, we develop a low overhead, yet simple, dynamically adaptive (i.e. at runtime) hybrid (i.e. combines hardware and software) TM (DyAdHyTM) scheme that combines the best features of both Hardware TM (HTM) and Software TM (STM) while adapting to application requirements. It performs better than coarse grain lock by up to 8.12x, a low overhead STM by up to 2.68x, a couple of implementations of HTMs (by up to 2.59x), and other HyTMs (by up to 1.55x) for SSCA2 graph benchmark running on a multicore machine with a large shared memory.