Robust Distributed Control of DC Microgrids with Time-Varying Power Sharing

TL;DR

This paper presents a robust control scheme for DC microgrids that ensures voltage regulation and dynamic power sharing among multiple sources, adaptable to both centralized and decentralized setups, with proven performance improvements.

Contribution

It introduces a novel control architecture that allows for time-varying power sharing and simplifies performance analysis to a single-converter model, applicable to various communication scenarios.

Findings

Quantifiable performance analysis of the microgrid control system.

Enhanced voltage regulation and power sharing demonstrated through case studies.

Effective control framework for both centralized and decentralized implementations.

Abstract

This paper addresses the problem of output voltage regulation for multiple DC/DC converters connected to a microgrid, and prescribes a scheme for sharing power among different sources. This architecture is structured in such a way that it admits quantifiable analysis of the closed-loop performance of the network of converters; the analysis simplifies to studying closed-loop performance of an equivalent {\em single-converter} system. The proposed architecture allows for the proportion in which the sources provide power to vary with time; thus overcoming limitations of our previous designs. Additionally, the proposed control framework is suitable to both centralized and decentralized implementations, i.e., the same control architecture can be employed for voltage regulation irrespective of the availability of common load-current (or power) measurement, without the need to modify controller parameters. The performance becomes quantifiably better with better communication of the demanded load to all the controllers at all the converters (in the centralized case); however guarantees viability when such communication is absent. Case studies comprising of battery, PV and generic sources are presented and demonstrate the enhanced performance of prescribed optimal controllers for voltage regulation and power sharing.

Equations

$$L{\dot{i}}_L(t)$$

$$C\dot{V}(t)$$

$$L\frac{d{i}_L(t)}{dt}$$

$$C\frac{dV(t)}{dt}$$

$$L\frac{d{i}_L(t)}{dt}$$

$$C\frac{dV(t)}{dt}$$

$${\tilde{G}}_c(s)=\left(\frac{\tilde{\omega }}{s+\tilde{\omega }}\right)\left(\frac{s^2+2{\zeta }_1{\omega }_{0}s+{\omega }_0^2}{s^2+2{\zeta }_2{\omega }_{0}s+{\omega }_0^2}\right).$$

$$K_c(s)=L\tilde{\omega }\frac{(s^2+2{\zeta }_1{\omega }_{0}s+{\omega }_0^2)}{(s^2+2{\zeta }_2{\omega }_{0}s+{\omega }_0^2+2({\zeta }_2-{\zeta }_1){\omega }_0\tilde{\omega })}.$$

$$\underbrace{\left[\begin{array}[]{c}z_{1}\\ z_{2}\\ z_{3}\\ z_{4}\\ e_{1}\\ e_{2}\end{array}\right]}_{z}=\underbrace{\left[\begin{array}[]{cccc}W_{1}&0&W_{1}G_{v}&-D^{\prime}W_{1}G_{v}\tilde{G}_{c}\\ \eta W_{2}&W_{2}&\eta W_{2}G_{v}&-D^{\prime}(1+\eta G_{v})W_{2}\tilde{G}_{c}\\ 0&0&0&W_{3}\\ 0&0&-W_{4}G_{v}&D^{\prime}W_{4}G_{v}\tilde{G}_{c}\\ 1&0&G_{v}&-D^{\prime}G_{v}\tilde{G}_{c}\\ \eta&1&\eta G_{v}&-D^{\prime}(1+\eta G_{v})\tilde{G}_{c}\end{array}\right]}_{T_{wz}}\underbrace{\left[\begin{array}[]{c}V_{\text{ref}}\\ i_{\text{ref}}\\ i_{\text{load}}\\ \hat{u}\end{array}\right]}_{w}.$$

$$V=G_v\left(-i_{\text{load}}+D^{\prime }{\tilde{G}}_c(K_v{e}_1+K_r{e}_2)\right).$$

$$V(s)=\left[\frac{D^{\prime }{\tilde{G}}_c{G}_v(K_v+\eta K_r)}{1+D^{\prime }{\tilde{G}}_c{K}_r+D^{\prime }{\tilde{G}}_c{G}_v(K_v+\eta K_r)}\right]V_{\text{ref}}(s)$$

$$+\left[\frac{D^{\prime }{\tilde{G}}_c{G}_v{K}_r}{1+D^{\prime }{\tilde{G}}_c{K}_r+D^{\prime }{\tilde{G}}_c{G}_v(K_v+\eta K_r)}\right]\left(i_{\text{ref}}(s)-i_{\text{load}}(s)\right)$$

$$-\left[\frac{G_v}{1+D^{\prime }{\tilde{G}}_c{K}_r+D^{\prime }{\tilde{G}}_c{G}_v(K_v+\eta K_r)}\right]i_{\text{load}}(s).$$

$$V(s)=T_{V_{\text{ref}}V}{V}_{\text{ref}}(s)+T_{i_{\text{ref}}V}\left(i_{\text{ref}}(s)-i_{\text{load}}(s)\right)-G_{v}S{i}_{\text{load}}(s).$$

$$|T_{V_{\text{ref}}V}(j0)|=1,|T_{i_{\text{ref}}V}(j0)|=\frac{|K_r(j0)|}{|K_v(j0)+\eta K_r(j0)|}\text{and}$$

$$|(G_{v}S)(j0)|=\frac{1}{D^{\prime }\left(|K_v(j0)+\eta K_r(j0)|\right)}.$$

$${\tilde{G}}_{c,nom}(s)=\left(\frac{\tilde{\omega }}{s+\tilde{\omega }}\right)\left(\frac{s^2+2{\zeta }_{1,nom}{\omega }_{0}s+{\omega }_0^2}{s^2+2{\zeta }_{2,nom}{\omega }_{0}s+{\omega }_0^2}\right),$$

$$\left|\frac{D_k^{\prime }{i}_{L_k}(j0)}{{\gamma }_k}-\frac{D_l^{\prime }{i}_{L_l}(j0)}{{\gamma }_l}\right|\le \left(\eta |{\tilde{T}}_1(j0)|+\left|\frac{1}{{\gamma }_k}-\frac{1}{{\gamma }_l}\right||{\tilde{T}}_2(j0)|\right)|e_1(j0)|$$

$$|e_1(j0)|\le \frac{1}{D^{\prime }(|K_v(j0)+\eta K_r(j0)|)}|i_{\text{ref}}(j0)|$$

$$|e_1(j0)|\le$$

$$\frac{|D_k^{\prime }{i}_{L_k}(j0)|}{|D_l^{\prime }{i}_{L_l}(j0)|}=\frac{{\gamma }_k}{{\gamma }_l}.$$

$$W_1=\frac{0.4167(s+452.4)}{(s+1.885)}{W}_2=\frac{0.4167(s+1056)}{(s+4.398)}$$

$$W_3=0.04W_4=\frac{37.037(s+314.2)}{(s+3.142\times 10^4)}$$

$$K_v$$

$$K_r$$

$$e_2$$

$$\Rightarrow e_2$$

$$e_2^{(k)}={\gamma }_k[i_{\text{ref}}+\eta e_1]-D^{\prime }{\tilde{G}}_{c,nom}\left(\frac{1}{m}{K}_v{e}_1+K_r{e}_2^{(k)}\right)$$

$$\displaystyle\underbrace{\sum_{k=1}^{m}e_{2}^{(k)}}_{e_{2}}=\sum_{k=1}^{m}\gamma_{k}[i_{\text{ref}}+\eta e_{1}]-D^{\prime}\tilde{G}_{c,nom}\Big{(}K_{v}e_{1}-K_{r}\underbrace{\sum_{k=1}^{m}e_{2}^{(k)}}_{e_{2}}\Big{)}.$$

$$e_2^{(k)}=\left(\frac{{\gamma }_k}{1+D^{\prime }{\tilde{G}}_{c,nom}{K}_r}\right)i_{\text{ref}}+\left(\frac{{\gamma }_k\eta -\frac{D^{\prime }}{m}{\tilde{G}}_{c,nom}{K}_v}{1+D^{\prime }{\tilde{G}}_{c,nom}{K}_r}\right)e_1.$$

$$i_k=D^{\prime }{\tilde{G}}_{c,nom}\left[\frac{1}{m}{K}_v{e}_1+K_r{e}_2^{(k)}\right].$$

$$i_k=D^{\prime }{\tilde{G}}_{c,nom}\left[\left(\frac{{\gamma }_k{K}_r}{1+D^{\prime }{\tilde{G}}_{c,nom}{K}_r}\right)i_{\text{ref}}+\left(\frac{\frac{1}{m}{K}_v+\eta {\gamma }_k{K}_r}{1+D^{\prime }{\tilde{G}}_{c,nom}{K}_r}\right)e_1\right]$$

$$\left|\frac{i_k(j0)}{{\gamma }_k}-\frac{i_l(j0)}{{\gamma }_l}\right|\le \left(\eta |{\tilde{T}}_1(j0)|+\left|\frac{1}{{\gamma }_k}-\frac{1}{{\gamma }_l}\right||{\tilde{T}}_2(j0)|\right)|e_1(j0)|$$

Full text

I INTRODUCTION

Utility grid is most stressed during peak power demands resulting in significant increase in real-time power prices and congestion in the local power distribution zone. Microgrids can help reduce the requirement for additional utility generation and thus minimize the demand on the utility grid by enabling integration of renewable energy sources such as solar and wind energy, distributed energy resources (DERs), energy storage, and demand response. Microgrids are localized grid systems that are capable of operating in parallel with, or independently from, the existing traditional grid [2, 3]. Fig. 1 shows a schematic of a microgrid with multiple DC sources providing power for AC loads. Existing control architectures for traditional grids, which are designed for relatively large conventional sources (power plants) of predictable and dispatchable electric power, cannot adequately manage uncertain power sources such as solar or wind generations. Limited predictability with such resources result in intermittent power generation; moreover time-varying loads, practicability and economics factors pose additional challenges in efficient operation of microgrids. Thus it is required to develop efficient distributed control technologies for reliable operation of smart microgrids [4].

In such smart grids, multiple DC power sources connected in parallel, each interfaced with DC-DC converter, provide power at their common output, the DC-link, at a regulated voltage; this power can directly feed DC loads or be used by an inverter to interface with AC loads (see Fig. 1). By appropriately controlling the switch duty-cycle of DC-DC converter at each power source, it becomes possible to manipulate electrical quantities such as the power output by the power source and the voltage at the DC-link. The main goals of the control design is to regulate voltage at the DC-link and ensuring a prescribed sharing of power between different sources; for instance, economic considerations can dictate that power provided by the sources should be in a certain proportion or according to a prescribed priority (e.g. PV$>$battery$>$EV where PV provides the maximum power it can to satisfy load demand, and the deficit is provided by battery,and then the EV). The main challenges arise from the uncertainties in the size and the schedules of loads, the complexity of a coupled multi-converter network, the uncertainties in the model parameters at each converter, and the adverse effects of interfacing DC power sources with AC loads, such as the $120$ Hz ripple that has to be provided by the DC sources.

Problems pertaining to robust and optimal control of converters have received recent attention. Conventional PID-based controllers often fail to address the problem of robustness and modeling uncertainties. In [5], a linear-matrix-inequality (LMI) based robust control design is presented for boost converters which demonstrates significant improvements in voltage regulation over PID based control designs. In [6, 7, 8], robust $\mathcal{H}_{\infty}$-control framework is employed in the context of inverter systems. While the issue of current sharing is extensively studied [9, 10], most methods assume a single power source. A systematic control design that addresses all the challenges and objectives for the multi-converter control is still lacking.

The control architecture proposed in this paper addresses the following primary objectives - a) voltage regulation at the DC-link with guaranteed robustness margins, b) prescribed time-varying power sharing in a network of parallel converters, c) controlling the trade-off between $120$Hz ripple on the total current provided by the power sources and the ripple on the DC-link voltage. While these objectives are partially addressed in our prior work [1] on the robust control of DC-DC converters, a main drawback of the design proposed in [1] is that the control framework does not allow for time-varying power sharing requirements. In this work, we propose a new architecture wherein the power requirements on each converter are imposed through external reference signals; this allows for time-varying power sharing/priority prescriptions. This is achieved without sacrificing any advantages of the design in [1].

An important feature of the proposed architecture is that it exploits structural features of the paralleled multi-converter system, which results in a modular and yet coordinated control design. Accordingly at each converter, it employs a nested (outer-voltage inner-current) control structure [11], where all converters share the same design for the outer-loop voltage controllers while the inner-loop current controllers are so chosen that the entire closed-loop multi-converter system can be reduced to an equivalent single-converter system in terms of the transfer function from the desired regulation setpoint $V_{\text{ref}}$ to the voltage at the DC-link $V$. An interesting aspect of the proposed implementation is that the same control implementation works for both the centralized case, when the load power is known and communicated to all the controllers, and the decentralized case where the load is unknown. The architecture achieves better performance in voltage regulation and power sharing when load power information is communicated, while it guarantees electrical viability with quantifiable bounds on deviations from the targeted performances in the decentralized case.

II MODELING OF CONVERTERS

In this section, we describe the differential equations that govern the dynamics of DC-DC converters. These converters belong to a class of switched-mode power electronics, where a semiconductor based high-frequency switching mechanism (and associated electronic circuit) connected to a DC power source enables changing voltage and current characteristics at its output. The models presented below depict dynamics for signals that are averaged over a switch cycle.

Fig. 2a shows a schematic of a Boost converter. Boost converter regulates a voltage $V$ at its output which is larger than the input voltage $V_{g}$. The averaged dynamic model of a Boost converter is given by

[TABLE]

where $d(t)$ represents the duty-cycle (or the proportion of ON duration) at time $t$. By defining $d^{\prime}(t):=1-d(t)$ and $D^{\prime}:=\left(V_{g}/V_{\text{ref}}\right)$, where $V_{\text{ref}}$ is the desired output voltage, (II) can be rewritten as,

[TABLE]

Note that $\hat{d}(t)=d^{\prime}(t)-D^{\prime}$ is typically very small, and therefore allows for a linear approximation around the nominal duty-cycle, $D=1-D^{\prime}$ (see [11] for details).

Similarly we can describe the averaged dynamics of a Buck converter,

[TABLE]

III PROBLEM FORMULATION

This paper addresses the following primary objectives simultaneously (in context of Fig. 1) - (a) Regulation of DC-link voltage $V$ to a prescribed value $V_{\text{ref}}$ in presence of time-varying loads/generation and parametric uncertainties, (b) time-varying current (power) sharing among multiple sources, that is, ensuring that current (power) outputs $i_{k}$ from each converter respectively track a time-varying signal $i_{\text{ref}_{k}}$, and (c) $120Hz$ ripple current sharing between the output currents $i_{k}$ from each converter and the capacitor current $i_{C}$. The last objective is dealt in our prior work [1] and is addressed by an appropriate design of inner-controller described in Sec. IV-A and V. In this paper, we primarily focus on achieving the first two objectives, while inheriting the properties of the inner-controller for ripple current sharing.

IV CONTROL FRAMEWORK FOR SINGLE CONVERTER

In this section, we describe the inner-outer control design for a single Boost converter system. This design for a single converter forms the basis for the analysis and design of control architecture for multiple converters presented in Sec. V. Fig. 3 shows the block diagram representation of the Boost converter based on the dynamical equations in (II). While the design is easily extendable to include other converter types such as Buck and Buck-Boost, the discussion has been confined to Boost converters only for the sake of brevity. Note that in the proposed control architecture (see Fig. 4), the inputs to outer feedback controller include $i_{\text{ref}}$ in addition to the typical $V_{\text{ref}}$ and the measured DC-link voltage $V$. The requirements on current sharing are imposed through this additional $i_{\text{ref}}$ signal (explained in Sec. V) by setting $i_{\text{ref}}$ to measured (or communicated) load current $i_{\text{load}}$ in the centralized case, and setting $i_{\text{ref}}$ to estimated (or prespecified signals) in the decentralized case.

IV-A Design of the inner-loop controller

The design for the inner-loop controller $K_{c}$ is inherited from our previous work [1]. The main objective for designing the inner-loop controller $K_{c}$ is to decide the trade-off between the $120$Hz ripple on the capacitor current $i_{C}$ (equivalently on the output voltage $V$) and the inductor current $i_{L}$ of the converter. Accordingly, $K_{c}$ is designed such that the inner-shaped plant $\tilde{G}_{c}$ is given by

[TABLE]

where $\omega_{0}=2\pi 120$rad/s and $\tilde{\omega},\zeta_{1},\zeta_{2}$ are design parameters. The parameter $\tilde{\omega}>\omega_{0}$ and it is used to implement a low-pass filter to attenuate undesirable frequency content in $i_{L}$ beyond $\tilde{\omega}$. Thus, the bandwidth of the inner closed-loop plant is decided by the choice of $\tilde{\omega}$. The parameters $\zeta_{1}$ and $\zeta_{2}$ impart a notch-like behavior to $\tilde{G}_{c}$ at $\omega_{0}=120$Hz, and the size of the notch is determined by the ratio $\zeta_{1}/\zeta_{2}$. Note that $\tilde{G}_{c}$ represents the inner closed-loop plant from the output of the outer-loop controllers $\tilde{u}$ to the inductor current $i_{L}$, and since $i_{C}=i_{L}-i_{\text{load}}$, the ratio $\zeta_{1}/\zeta_{2}$ can be appropriately designed to achieve a specified trade-off between $120$Hz ripple on $i_{C}$ and $i_{L}$, and therefore between $V$ and $i_{L}$. The stabilizing $2^{nd}$-order controller $K_{c}$ that yields the aforementioned inner closed-loop plant $\tilde{G}_{c}$ is explicitly given by

[TABLE]

The readers are encouraged to refer to Sec. III in [1] for further details on the inner-loop control design.

IV-B Design of the outer-loop controller

For a given choice of inner-controller $K_{c}$, we present our analysis and design of controller in terms of transfer function block diagrams shown in Fig. 4. In this figure, $\tilde{G}_{c}$ represents the inner shaped plant. The outer controllers are denoted by $K_{v}$ and $K_{r}$, and are designed to regulate the output DC voltage $V$ to the desired reference voltage $V_{\text{ref}}$ and the output current $D^{\prime}i_{L}$ to the reference current $i_{\text{ref}}$, respectively. Note that from (II), $D^{\prime}i_{L}$ is equal to $i_{\text{load}}$ at steady-state. The augmentation of controller $K_{r}$ forms the basis for time-varying power sharing and is explained in the next section. It should be remarked that the proposed design has a feature that if the load current measurement is available, i.e., $i_{\text{ref}}=i_{\text{load}}$, then the steady state DC output voltage is maintained at the reference voltage $V_{\text{ref}}$. However in the absence of $i_{\text{load}}$ measurement, the outer controller $K_{r}$ regulates the output current $D^{\prime}i_{L}$ to $i_{\text{ref}}\neq i_{\text{load}}$ resulting in an output voltage $V\neq V_{\text{ref}}$. The mismatch in voltage tracking is captured by a pre-specified droop-like coefficient $\eta$ in a controlled manner, the notable difference here being the application of droop to the faster current loop when compared with the conventional droop-based design acting on the slower voltage loop. This feature is mathematically quantified in the following discussion on the proposed control design.

The performance of a Boost converter is characterized by its voltage and power reference tracking bandwidths, better voltage signal-to-noise-ratio (SNR), and robustness to modeling uncertainties. The main objective for the design of the controllers $K_{v}$ and $K_{r}$ is to make the tracking errors small and simultaneously attenuate measurement noise to achieve high resolution. This is achieved by posing a model-based multi-objective optimization problem, where the required objectives are described in terms of norms of the corresponding transfer functions, as described below. Note that the regulated variables $z_{1},z_{2},z_{3}$ and $z_{4}$ correspond to weighted - (a) tracking error in DC-link voltage, (b) mismatch between $i_{\text{ref}}$ and $i_{\text{load}}$, (c) control effort $\hat{u}$, and (d) output voltage tracking, respectively. From Fig. 4, the transfer function from exogenous inputs and auxiliary control input $w=\left[V_{\text{ref}},i_{\text{ref}},i_{\text{load}},\hat{u}\right]^{T}$ to regulated output $z=\left[z_{1},z_{2},z_{3},z_{4},e_{1},e_{2}\right]$ is given by

[TABLE]

The optimization problem is to find stabilizing controllers $K_{outer}=\left[K_{v},K_{r}\right]^{T}$ such that the $\mathcal{H}_{\infty}$-norm of the above transfer function from $w$ to $z$ is minimized. Here the weights $W_{1},W_{2},W_{3}$ and $W_{4}$ are chosen to reflect the design specifications of robustness to parametric uncertainties, tracking bandwidth, and saturation limits on the control signal. More specifically, the weight functions $W_{1}(j\omega)$ and $W_{2}(j\omega)$ are chosen to be large in frequency range $\left[0,\omega_{BW}\right]$ to ensure small tracking errors $e_{1}=V_{\text{ref}}-V$ and $e_{2}=i_{\text{ref}}+\eta e_{1}-D^{\prime}i_{L}$ in this frequency range. The design of weight function $W_{3}(j\omega)$ entails ensuring that the control effort lies within saturation limits. The weight function $W_{4}$ is designed as a high-pass filter to ensure that the transfer function from $i_{\text{load}}$ to $V$ is small at high frequencies to provide mitigation to measurement noise.

Note that for the system shown in Fig. 4, the voltage $V$ at the DC-link is given by,

[TABLE]

Using the fact that $e_{1}=V_{\text{ref}}-V$ and $e_{2}=i_{\text{ref}}+\eta e_{1}-D^{\prime}\tilde{G}_{c}(K_{v}e_{1}+K_{r}e_{2})$, the DC-link voltage in terms of exogenous quantities $V_{\text{ref}},i_{\text{ref}}$ and $i_{\text{load}}$ is given by

[TABLE]

Let $S(s),T_{V_{\text{ref}}V}$ and $T_{i_{\text{ref}}V}$ denote the closed-loop sensitivity transfer function and complementary sensitivity transfer functions from $V_{\text{ref}}$ to $V$ and $i_{\text{ref}}$ to $V$, respectively. Then (IV-B) can be rewritten as

[TABLE]

The DC gains of above closed-loop transfer functions are given by (since $G_{v}=1/sC$ has an infinite DC gain),

[TABLE]

We now provide a sketch of the proposed design concept. Since $K_{v}$ and $K_{r}$ are chosen as high DC-gain controllers (obtained by solving the $\mathcal{H}_{\infty}$ optimization problem), we have $|G_{v}S((j\omega))|\approx 0$ at low-frequencies. Thus the effect of disturbance signal $i_{\text{load}}$ is insignificant at low frequencies. Similarly $T_{V_{\text{ref}}V}(j\omega)$ has unity gain at low frequencies. Furthermore, if the load current $i_{\text{load}}$ measurement is available (i.e. $i_{\text{ref}}=i_{\text{load}}$), then the Boost converter tracks the reference voltage with almost unity gain. However in the absence of $i_{\text{load}}$ measurement, the tracking error depends on the mismatch between $i_{\text{ref}}$ and $i_{\text{load}}$, i.e., the bound on the steady-state tracking error becomes proportional to $\dfrac{|K_{r}(j0)|}{|K_{v}(j0)+\eta K_{r}(j0)|}$ multiplied by the mismatch value $|i_{\text{ref}}(j0)-i_{\text{load}}(j0)|$. By choosing appropriate controllers $K_{v}$ and $K_{r}$ (i.e., $|T_{i_{\text{ref}}V}(j0)|<<1$), the tracking error can be made small.

Extension to Buck Converters: The extension of the proposed control design to Buck and Buck-Boost DC-DC converters is easily explained after noting that their averaged models are structurally identical to Boost converters, except that the dependence of duty cycles on the control signal $u$ or constant parameter $D^{\prime}$ are different. The differences in how duty cycles depend on $u(t)$ do not matter from the control design viewpoint since duty cycles for pulse-width modulation are obtained only after obtaining the control designs (that use the averaged models).

V EXTENSION TO A SYSTEM OF PARALLEL CONVERTERS

In this section we extend our control framework for a single converter to a system of DC-DC converters connected in parallel in the context of power sharing, keeping in mind the practicability and robustness to modeling and load uncertainties. In particular, we analyze the multi-converter system in Fig. 5b through an equivalent single-converter system (similar to the system shown in Fig. 4), where the multi-converter system inherits the performance and robustness achieved by a design for the single-converter system.

Fig. 5a represents an inner-outer control framework for a system of $m$ parallel connected converters. Note that instead of feeding the reference current i_{\text{ref{}_{k}}} directly to the $k^{th}$ outer controller $K_{r_{k}}$, the reference signal $i_{\text{ref}}+\eta(V_{\text{ref}}-V)$ is prescaled by a time-varying multiplier $\gamma_{k},0\leq\gamma_{k}\leq 1$. The choice of $\gamma_{k}$ dictates the power sharing requirements on the $k^{th}$ converter. In fact, we later show that the proposed implementation distributes the output power in the ratios $\gamma_{1}:\gamma_{2}:..:\gamma_{m}$. After noting that the voltage-regulation and current reference tracking is common to all the outer controllers, in our architecture, we impose the same design for outer-controllers for all the converters, i.e., $K_{v_{1}}=K_{v_{2}}=..=K_{v_{m}}$ and $K_{r_{1}}=K_{r_{2}}=..=K_{r_{m}}$. This imposition enables significant reduction in the overall complexity of the distributed control design for a parallel network of converters and power sources, thus ensuring the practicability of the proposed design which allows integration of power sources of different types and values.

We design inner-controllers $K_{c_{k}}$ such that the inner-shaped plants from $\tilde{u}_{k}$ to $i_{L_{k}}$ are same and given by,

[TABLE]

where the ratio $\zeta_{1,nom}/\zeta_{2,nom}$ determines the tradeoff of $120$Hz ripple between the total output current $D^{\prime}i_{L}=\sum\limits_{k=1}^{m}D^{\prime}_{k}i_{L_{k}}$ and the capacitor current $i_{C}$. Note that for given values of $\zeta_{1,nom},\zeta_{2,nom}$ and inductance $L_{k}$, explicit design of $K_{c_{k}}$ exists and is given by (5). After noting that $K_{v_{k}}=\frac{1}{m}K_{v}$ and $K_{r_{k}}=K_{r}$, the system in Fig. 5a can be simplified to Fig. 5b.

Indeed, by our choice of inner and outer controllers, the transfer functions from external references $V_{\text{ref}}$, $i_{\text{ref}}$ and $i_{\text{load}}$ to the desired output $V$ are identical for all converters. Hence the entire network of parallel converters can be analyzed in the context of an equivalent single converter system. This implies that $K_{v_{k}}$ and $K_{r_{k}}$ can be computed by solving $\mathcal{H}_{\infty}$-optimization problem (as discussed in the previous section) similar to the single converter case. We make these design specifications more precise and bring out the equivalence of the control design for the single and multiple converter systems in the following theorem.

We say that the system representation in Fig. 4 is equivalent to that in Fig. 5b, when the transfer functions from the reference voltage $V_{\text{ref}}$, reference current $i_{\text{ref}}$ and load current $i_{\text{load}}$ to the DC-link voltage $V$ in Fig. 4 are identical to the corresponding transfer functions in Fig. 5b.

Theorem 1

*Consider the single-converter system in Fig. 4 with inner-shaped plant $\tilde{G}_{c,nom}(s)$ as given in (9), outer controllers $K_{v}$, $K_{r}$, droop-coefficient $\eta$, and external references $V_{\text{ref}},i_{\text{load}},i_{\text{ref}}$; and the multi-converter system described in Figs. 5a and 5b with inner-shaped plants $\tilde{G}_{c_{k}}=\tilde{G}_{c,nom}(s)$ and outer controllers $K_{v_{k}}=\frac{1}{m}K_{v}$; $K_{r_{k}}=K_{r}$, droop-coefficient $\eta$, and same external references $V_{\text{ref}},i_{\text{load}}$ and reference current $i_{\text{ref}}$ prescaled by time-varying scalars $\gamma_{k}>0$ for $1\leq k\leq m$.

1. [System Equivalence]: If $\sum_{k=1}^{m}\gamma_{k}=1$, then the system representation in Fig. 4 is equivalent to the system representation in Fig. 5b.

2. [Power Sharing]: For any two converters $k$ and $l$, $k,l\in\{1,\ldots,m\}$ in a multi-converter system shown in Fig. 5b, the difference in the corresponding steady-state scaled output currents is given by*

[TABLE]

*where, $\tilde{T}_{1}:=\frac{D^{\prime}\tilde{G}_{c,nom}K_{r}}{(1+D^{\prime}\tilde{G}_{c,nom}K_{r})}$ and $\tilde{T}_{2}:=\frac{D^{\prime}\tilde{G}_{c,nom}K_{v}}{m(1+D^{\prime}\tilde{G}_{c,nom}K_{r})}$. Furthermore, the steady-state tracking error $e_{1}\triangleq V_{\text{ref}}-V$ in DC-link voltage is upper bounded by,

Centralized case: $i_{\text{ref}}=i_{\text{load}}$ *

[TABLE]

Decentralized case*: $i_{\text{ref}}\neq i_{\text{load}}$ *

[TABLE]

Remark 1: If the steady-state tracking error in DC-link voltage is zero, i.e., $|e_{1}(j0)|=0$, then (10) reduces to the following constraint:

[TABLE]

i.e., the closed-loop multi-converter system achieves output power sharing given by $|D_{1}^{\prime}i_{L_{1}}(j0)|:\ldots:|D_{m}^{\prime}i_{L_{m}}(j0)|=\gamma_{1}:\ldots:\gamma_{l}$. In practice the tracking error $e_{1}$ is never exactly zero, however, the tracking error is made practically non-existent through an appropriate choice of large DC-gain controllers $K_{v},K_{r}$ resulting from the $\mathcal{H}_{\infty}$ optimization problem in (6). Moreover, the design of the controllers is such that $|K_{v}(j0)|<|K_{r}(j0)|$ resulting in $|\tilde{T}_{1}(j0)|\leq 1$ and $|\tilde{T}_{2}(j0)|\leq 1$. The readers are encouraged to refer to the next section for more details where we provide controller transfer functions for few example scenarios.

Remark 2: For the decentralized implementation, it is required that each converter can measure its own inductor current $i_{L_{k}}$ and DC-link voltage $V$ only.

Proof: See Appendix.

VI CASE STUDIES: SIMULATIONS AND DISCUSSIONS

In this section, we report some simulation studies that cover different aspects of the proposed distributed control design. All simulations are performed in MATLAB/Simulink using SimPower/SimElectronics library. Note that the experiments are underway and therefore not reported in this paper. In order to include nonlinearities associated with real-world experiments, and effects of switching frequencies on voltage regulation and power sharing, we use non-ideal components (such as diodes with non-zero forward-bias voltage, IGBT switches, stray capacitances, parametric uncertainties) and switched level implementation.

For simulations, we consider a parallel network of three boost converters powered by a Li-ion battery and two generic sources (nominal voltages $125V$), respectively. The effectiveness of the proposed control design is well illustrated by considering a challenging practical scenario with (unknown) fast time-varying load, large uncertainties in inductance and capacitance values, sensor noises and variation in input source voltages. Specifically, we consider the following simulation parameters:

Source and Converter Parameters:

•

Battery State-Of-Charge: $120\%(\sim 135V)$

•

Generic Sources: $125V$ and $130V$

•

Inductance: $(L_{1},L_{2},L_{3})=(.096,.12,.14)$mH

•

Capacitance: $C=400\mu$F

Photovoltaic System:

•

$8$hrs of Insolation data is squeezed to $19.5s$

•

Peak Power: $1700$W

Output Requirements:

•

Loading Conditions: $5kW\pm(2kW@1Hz)$

•

Power Sharing Requirements:

$(0.33:0.33:0.33),\quad t<2s$

$(0.5:0.2:0.3),\quad 2s\leq t\leq 19.5s$

•

Desired Output Voltage: $V_{\text{ref}}=250V$

Other Simulation Parameters:

•

Total Simulation Time: $19.5$s

•

Droop-Gain Coefficient: $\eta=1.2667$

•

Voltage-Sensor Noises:

DC-Offset: $+2V$, Noise: SNR$\sim 0.05\%$

DC-Offset: $-2V$

DC-Offset: $+3V$

To illustrate the robustness of the proposed approach, the nominal (or equivalent single converter) inductance, capacitance and steady-state complementary duty-cycle are chosen as $L=0.12$mH, $C=500\mu$F and $D^{\prime}=V_{g}/V_{\text{ref}}=0.5$. The design parameters for the inner-controller $K_{c}$ are: Damping factors $\zeta_{1}=0.7$, $\zeta_{2}=2.2$, and bandwidth $\tilde{\omega}=2\pi 300$rad/s.

The outer controllers $K_{v}$ and $K_{r}$ are obtained by solving the stacked $\mathcal{H}_{\infty}$ optimization problem (see Eq. (6))[12] with the weighting functions:

[TABLE]

The resulting outer-controllers are reduced to sixth-order using balanced reduction [13] and are given by,

[TABLE]

Inclusion and characterization of PV module: Photovoltaics are technically treated as current sources. In a microgrid setup, a PV module is interfaced with the DC-link through a Boost converter and is controlled using the maximum power point tracking (MPPT) algorithm. The output current of PV $i_{\text{PV}}$ is directly proportional to the (time-varying) irradiance and is included in our proposed formulation by regarding $i_{\text{PV}}$ as part of the disturbance signal, i.e., the net disturbance current is modeled as $i_{\text{load}}-i_{\text{PV}}$. In this simulation study, we squeeze worth $8$ hours of insolation data into a total duration of $19.5s$ amounting to rapidly varying irradiance (and hence the disturbance current $i_{\text{PV}}$). Note that this is a challenging problem to consider from not only MPPT point-of-view, but also on the account of DC-link voltage regulation coupled with time-varying (and uncertain) loads and time-dependent power-sharing requirements.

Results: The controllers derived for the nominal single converter system are then extended for a parallel multi-converter design as described in Sec. V. The initial DC-link voltage is considered at $0V$. Fig. 6 shows the voltage regulation at the DC-link to the reference $V_{\text{ref}}=250V$ for the centralized ($i_{\text{load}}$ measurement available) and decentralized implementations. Note that the DC-link load changes by $4kW$ every second ($3kW$ to $7kW$, and $7kW$ to $3kW$). The reference current is considered as $i_{\text{ref}}=5kW/250V=20A$. While in the centralized case (Fig. 6a), the voltage is maintained at $V_{\text{ref}}=250V$ with small periodic spikes attributed to sudden load changes, the decentralized implementation results in controlled voltage droop of $10V$ peak-to-peak around the desired DC-link voltage.

Fig. 7 presents the results for time-varying sharing. For ease of illustration, the scaled output currents $D^{\prime}i_{L}/\gamma$ are plotted. The power sharing requirements are described in the output requirements section. Overlapping values of scaled currents depict excellent sharing performance; moreover, the control design achieves step-change in power sharing seamlessly at $t=2s$.

Fig. 8 shows the result of incremental conductance based MPPT for the chosen PV system for the two scenarios. It is observed that the availability of $i_{\text{load}}$ measurement results in smoother PV curve in Fig. 8a, while the decentralized implementation has slight periodic jumps in PV curve resulting from voltage droop.

VII CONCLUSIONS AND FUTURE WORK

In this work, we propose a distributed control architecture for voltage tracking and power sharing for a network of DC-DC converters connected in parallel. The proposed design is capable of achieving multiple objectives such as robustness to modeling uncertainties, reference DC voltage generation and output power sharing among multiple DC sources. The controllers are designed using a robust optimal control framework. A remarkable feature of the proposed control approach is the ability to achieve DC-link voltage regulation for both centralized and decentralized scenarios without the need to modify the controller structure or the parameters. Experimental validation of the proposed approach is underway and will soon be reported in our subsequent work.

ACKNOWLEDGMENT

The authors would like to acknowledge ARPA-E NODES program for supporting this work.

APPENDIX

Sketch of Proof of Theorem 1: System Equivalence

Proof:

The equivalence is a direct consequence of cleverly chosen architecture. Note that for the single converter system in Fig. 4 with $\tilde{G}_{c}(s)=\tilde{G}_{c,nom}(s)$, the error signal $e_{2}$ (input to controller $K_{r}$) is given by

[TABLE]

For the multi-converter system in Fig. 5b, we have $e_{1}^{(k)}=V_{\text{ref}}-V:=e_{1}$. Let us denote the total error in current mismatch $\sum_{k=1}^{m}e_{2}^{k}$ by $e_{2}$. Therefore, from Fig. 5b,

[TABLE]

Using the fact that $\sum_{k=1}^{m}\gamma_{k}=1$, the above equation reduces to (Proof:). Similarly, the expression for tracking error in voltage $V_{\text{ref}}-V$ is identical for the single and multiple converters case. Moreover for the multi-converter system, the output voltage at the DC-link is given by $V=G_{v}(-i_{\text{load}}+D^{\prime}\tilde{G}_{c,nom}(K_{v}e_{1}+K_{r}e_{2}))$. Since the expressions for $e_{1}$ and $e_{2}$ are identical for the single and multiple converters case and are written in terms of the exogenous variables $V_{\text{ref}},i_{\text{ref}},i_{\text{load}}$, the corresponding transfer functions from the exogenous variables to the DC-link voltage $V$ are also identical, and hence establishes the required equivalence. Similar conclusions can be drawn for other signals, such as DC-link voltage $V$, and hence establishes the required equivalence. ∎

Sketch of Proof of Theorem 1: Power Sharing

Proof:

From (Proof:), the error in current reference for the $k^{th}$-converter is given by

[TABLE]

From Fig. 5b, the output current $i_{k}=D_{k}^{\prime}i_{L_{k}}$ of the $k^{th}$ converter is given by

[TABLE]

Thus from (13) and (14), we obtain

[TABLE]

Therefore, we have

[TABLE]

The expressions for the bounds on the tracking error for the two scenarios is directly obtained from (IV-B) and the system equivalence described earlier. ∎