Reducing Competitive Cache Misses in Modern Processor Architectures

TL;DR

This paper proposes a technique to reduce competitive cache misses in multicore processors by allocating virtual cache parts to threads, resulting in up to 15% performance improvement.

Contribution

It introduces a novel method for decreasing cache misses through virtual cache partitioning, enhancing performance in modern multicore architectures.

Findings

Cache misses decreased by up to 15%.

Performance improved with the new technique.

Virtual cache partitioning effectively reduces cache contention.

Abstract

The increasing number of threads inside the cores of a multicore processor, and competitive access to the shared cache memory, become the main reasons for an increased number of competitive cache misses and performance decline. Inevitably, the development of modern processor architectures leads to an increased number of cache misses. In this paper, we make an attempt to implement a technique for decreasing the number of competitive cache misses in the first level of cache memory. This technique enables competitive access to the entire cache memory when there is a hit - but, if there are cache misses, memory data (by using replacement techniques) is put in a virtual part given to threads, so that competitive cache misses are avoided. By using a simulator tool, the results show a decrease in the number of cache misses and performance increase for up to 15%. The conclusion that comes out of this research is that cache misses are a real challenge for future processor designers, in order to hide memory latency.