High Performance CNFET-based Ternary Full Adders

TL;DR

This paper explores the design of high-performance ternary full adders using CNFET technology, demonstrating faster operation under various conditions through simulation.

Contribution

It introduces novel CNFET-based ternary full adder circuits that leverage adjustable threshold voltages for improved speed.

Findings

Proposed circuits are faster than existing CNFET ternary adders.

Simulations confirm robustness across different voltages, temperatures, and frequencies.

Design utilizes CNFET properties for optimized threshold voltage control.

Abstract

This paper investigates the use of carbon nanotube field effect transistors (CNFETs) for the design of ternary full adder cells. The proposed circuits have been designed based on the unique properties of CNFETs such as having desired threshold voltages by adjusting diameter of the CNFETs gate nanotubes. The proposed circuits are examined using HSPICE simulator with the standard 32 nm CNFET technology. The proposed methods are simulated at different conditions such as different supply voltages, different temperature and operational frequencies. Simulation results show that the proposed designs are faster than the state of the art CNFET based ternary full adders.