Phase Noise and Jitter in Digital Electronics

TL;DR

This paper explores phase noise and jitter in digital circuits, analyzing their types, scaling rules, experimental measurement techniques, and effects on high-demand applications, with insights into flicker noise, PLL interactions, and thermal effects.

Contribution

It introduces the concepts of phase and time type phase noise, and provides experimental data and analysis on noise behavior in various digital devices and circuits.

Findings

Flicker noise ranges from -80 to -130 dBrad^2/Hz at 1 Hz offset.

White noise can reach -165 dBrad^2/Hz with proper techniques.

Flicker noise is proportional to the reciprocal of transistor volume.

Abstract

This article explains phase noise, jitter, and some slower phenomena in digital integrated circuits, focusing on high-demanding, noise-critical applications. We introduce the concept of phase type and time type phase noise. The rules for scaling the noise with frequency are chiefly determined by the spectral properties of these two basic types, by the aliasing phenomenon, and by the input and output circuits. Then, we discuss the parameter extraction from experimental data and we report on the measured phase noise in some selected devices of different node size and complexity. We observed flicker noise between -80 and -130 dBrad^2/Hz at 1 Hz offset, and white noise down to -165 dBrad^2/Hz in some fortunate cases and using the appropriate tricks. It turns out that flicker noise is proportional to the reciprocal of the volume of the transistor. This unpleasant conclusion is supported by a gedanken experiment. Further experiments provide understanding on: (i) the interplay between noise sources in the internal PLL, often present in FPGAs; (ii) the chattering phenomenon, which consists in multiple bouncing at transitions; and (iii) thermal time constants, and their effect on phase wander and on the Allan variance.