Inhomogeneous screening of gate electric field by interface states in graphene FETs

TL;DR

This study investigates the inhomogeneous interface states at the graphene-SiO2 interface and their impact on local electronic properties in graphene FETs, revealing how interface state distribution affects gate screening and Fermi level pinning.

Contribution

It introduces a model incorporating inhomogeneous interface states to explain local electronic behavior in graphene FETs, highlighting the significance of $D_{it}(E)$ distribution.

Findings

Interface states' density $D_{it}(E)$ is highly inhomogeneous in energy.

Broad $D_{it}(E)$ reduces effective Fermi velocity.

Narrow $D_{it}(E)$ causes Fermi energy pinning near the Dirac point.

Abstract

The electronic states at graphene-SiO$_2$ interface and their inhomogeneity was investigated using the back-gate-voltage dependence of local tunnel spectra acquired with a scanning tunneling microscope. The conductance spectra show two, or occasionally three, minima that evolve along the bias-voltage axis with the back gate voltage. This evolution is modeled using tip-gating and interface states. The energy dependent interface states' density, $D_{it}(E)$, required to model the back-gate evolution of the minima, is found to have significant inhomogeneity in its energy-width. A broad $D_{it}(E)$ leads to an effect similar to a reduction in the Fermi velocity while the narrow $D_{it}(E)$ leads to the pinning of the Fermi energy close to the Dirac point, as observed in some places, due to enhanced screening of the gate electric field by the narrow $D_{it}(E)$