Prototyping RISC Based, Reconfigurable Networking Applications in Open Source
Jong Hun Han, Noa Zilberman, Bjoern A. Zeeb, Andreas Fiessler, Andrew, W. Moore

TL;DR
This paper explores open source, RISC-based SoC architectures implemented on NetFPGA-SUME for flexible, high-performance networking applications, enabling cost-effective updates and development of networking devices.
Contribution
It introduces a novel open source RISC-based SoC architecture on NetFPGA-SUME, detailing hardware implementation, OS porting, and practical networking use cases.
Findings
Successful implementation of RISC-based architecture on NetFPGA-SUME
Demonstrated OS porting and hardware integration
Provided practical networking appliance use cases
Abstract
In the last decade we have witnessed a rapid growth in data center systems, requiring new and highly complex networking devices. The need to refresh networking infrastructure whenever new protocols or functions are introduced, and the increasing costs that this entails, are of a concern to all data center providers. New generations of Systems on Chip (SoC), integrating microprocessors and higher bandwidth interfaces, are an emerging solution to this problem. These devices permit entirely new systems and architectures that can obviate the replacement of existing networking devices while enabling seamless functionality change. In this work, we explore open source, RISC based, SoC architectures with high performance networking capabilities. The prototype architectures are implemented on the NetFPGA-SUME platform. Beyond details of the architecture, we also describe the hardware…
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Taxonomy
TopicsInterconnection Networks and Systems · Parallel Computing and Optimization Techniques · Software-Defined Networks and 5G
