An Artificial Neural Networks based Temperature Prediction Framework for Network-on-Chip based Multicore Platform

TL;DR

This paper proposes an ANN-based framework for predicting thermal profiles in multicore chips with Network-on-Chip architectures, enabling proactive thermal management to improve reliability and efficiency.

Contribution

It introduces a novel ANN prediction engine for thermal profiling of cores and NoC elements, integrating predictive DTM with wireless interconnects for efficient thermal control.

Findings

ANN prediction achieves high accuracy in thermal profiling.

Proactive DTM reduces temperature overshoot and improves chip reliability.

Wireless interconnect enables efficient thermal message distribution.

Abstract

Continuous improvement in silicon process technologies has made possible the integration of hundreds of cores on a single chip. However, power and heat have become dominant constraints in designing these massive multicore chips causing issues with reliability, timing variations and reduced lifetime of the chips. Dynamic Thermal Management (DTM) is a solution to avoid high temperatures on the die. Typical DTM schemes only address core level thermal issues. However, the Network-on-chip (NoC) paradigm, which has emerged as an enabling methodology for integrating hundreds to thousands of cores on the same die can contribute significantly to the thermal issues. Moreover, the typical DTM is triggered reactively based on temperature measurements from on-chip thermal sensor requiring long reaction times whereas predictive DTM method estimates future temperature in advance, eliminating the chance of temperature overshoot. Artificial Neural Networks (ANNs) have been used in various domains for modeling and prediction with high accuracy due to its ability to learn and adapt. This thesis concentrates on designing an ANN prediction engine to predict the thermal profile of the cores and Network-on-Chip elements of the chip. This thermal profile of the chip is then used by the predictive DTM that combines both core level and network level DTM techniques. On-chip wireless interconnect which is recently envisioned to enable energy-efficient data exchange between cores in a multicore environment, will be used to provide a broadcast-capable medium to efficiently distribute thermal control messages to trigger and manage the DTM schemes.