Software-Defined Silicon Photonics based Metro Node for Spatial and Wavelength Superchannel Switching

TL;DR

This paper presents a silicon photonics-based superchannel switching device using monolithically integrated micro-ring resonators, enabling low-power, high-speed, and compact reconfigurable optical networks over 50 km fiber links.

Contribution

It introduces a novel silicon photonics superchannel switch with integrated micro-ring resonators capable of spatial and wavelength flexibility, demonstrating practical high-speed reconfiguration.

Findings

Successful unicast and multicast superchannel switching over 50 km fiber

All sub-channels perform below 7% FEC limit despite some degradation

Switching reconfiguration occurs within microseconds

Abstract

Due to the growing popularity of optical superchannels and software defined networking, reconfigurable optical add-drop multiplexer (ROADM) architectures for superchannel switching have recently attracted significant attention. ROADMs based on micro electro-mechanical system (MEMS) and liquid crystal-on-silicon (LCoS) technologies are predominantly used. Motivated by requirements for low power, high-speed, small area footprint and compact switching solutions, we propose and demonstrate spatial and wavelength flexible superchannel switching using monolithically integrated silicon photonics (SiP) micro-ring resonators (MRR). We demonstrate the MRRs capabilities and potential to be used as a fundamental building block in ROADMs. Unicast and multicast switching operation of an entire superchannel is demonstrated after transmission over 50 km of standard single mode fiber. The performance of each sub-channel from the 120 Gb/s QPSK Nyquist superchannel is analyzed and degradation in error vector magnitude performance was observed for outer sub-channels due to the 3-dB bandwidth of the MRRs, which is comparable with the superchannel bandwidth. However, all sub-channels for all switching cases (unicast, multicast and bi-directional operation) exhibit performance far below the 7% FEC limit. The switching time of the SiP MRR chip is such that high capacity superchannel interconnects between users can be setup and reconfigured on the microsecond timescale.