ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architectures
Yu-Ting Chen, Jason Cong, Zhenman Fang, Bingjun Xiao, Peipei Zhou

TL;DR
ARAPrototyper is a versatile FPGA-based platform that accelerates the design, prototyping, and evaluation of accelerator-rich architectures, significantly reducing development time compared to traditional simulation methods.
Contribution
It introduces a reusable, customizable FPGA prototype with automated design flow and software support, enabling rapid exploration of ARA design spaces.
Findings
Achieves 4,000X to 10,000X faster evaluation than full-system simulation.
Supports high-level synthesis accelerators with automated integration.
Facilitates comprehensive design space exploration for ARAs.
Abstract
Compared to conventional general-purpose processors, accelerator-rich architectures (ARAs) can provide orders-of-magnitude performance and energy gains and are emerging as one of the most promising solutions in the age of dark silicon. However, many design issues related to the complex interaction between general-purpose cores, accelerators, customized on-chip interconnects, and memory systems remain unclear and difficult to evaluate. In this paper we design and implement the ARAPrototyper to enable rapid design space explorations for ARAs in real silicons and reduce the tedious prototyping efforts far down to manageable efforts. First, ARAPrototyper provides a reusable baseline prototype with a highly customizable memory system, including interconnect between accelerators and buffers, interconnect between buffers and last-level cache (LLC) or DRAM, coherency choice at LLC or DRAM,…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsParallel Computing and Optimization Techniques · Embedded Systems Design Techniques · Interconnection Networks and Systems
