Real-Time Image Distortion Correction: Analysis and Evaluation of FPGA-Compatible Algorithms

TL;DR

This paper introduces and evaluates FPGA-compatible algorithms for real-time image distortion correction, focusing on output quality, robustness to lens distortion, and hardware resource requirements.

Contribution

It presents new hardware-compatible techniques for image distortion correction and provides a detailed analysis and comparison of their performance and resource usage.

Findings

Algorithms achieve high output quality with minimal hardware resources.

Robustness increases with higher lens distortion levels.

Hardware resource estimates guide FPGA implementation choices.

Abstract

Image distortion correction is a critical pre-processing step for a variety of computer vision and image processing algorithms. Standard real-time software implementations are generally not suited for direct hardware porting, so appropriated versions need to be designed in order to obtain implementations deployable on FPGAs. In this paper, hardware-compatible techniques for image distortion correction are introduced and analyzed in details. The considered solutions are compared in terms of output quality by using a geometrical-error-based approach, with particular emphasis on robustness with respect to increasing lens distortion. The required amount of hardware resources is also estimated for each considered approach.