A 481pJ/decision 3.4M decision/s Multifunctional Deep In-memory Inference Processor using Standard 6T SRAM Array

TL;DR

This paper presents a deep in-memory inference processor using standard 6T SRAM arrays that significantly reduces energy consumption while maintaining accuracy across multiple applications.

Contribution

It introduces a multi-functional deep in-memory processor leveraging analog processing within standard SRAM arrays, achieving high energy efficiency with minimal accuracy loss.

Findings

Up to 5.6X energy savings in prototype

Negligible (<1%) accuracy degradation

Demonstrated across four applications

Abstract

This paper describes a multi-functional deep in-memory processor for inference applications. Deep in-memory processing is achieved by embedding pitch-matched low-SNR analog processing into a standard 6T 16KB SRAM array in 65 nm CMOS. Four applications are demonstrated. The prototype achieves up to 5.6X (9.7X estimated for multi-bank scenario) energy savings with negligible (<1%) accuracy degradation in all four applications as compared to the conventional architecture.