Silicon CMOS architecture for a spin-based quantum computer

TL;DR

This paper proposes a scalable silicon CMOS architecture for a quantum computer using spin qubits in quantum dots, integrating existing technology for control, measurement, and error correction.

Contribution

It introduces a CMOS-based quantum processor design utilizing transistor control, charge storage, and microwave cavities for scalable quantum computing.

Findings

Compatible with surface code quantum error correction

Uses existing CMOS technology and components

Enables large-scale universal quantum computation

Abstract

Recent advances in quantum error correction (QEC) codes for fault-tolerant quantum computing \cite{Terhal2015} and physical realizations of high-fidelity qubits in a broad range of platforms \cite{Kok2007, Brown2011, Barends2014, Waldherr2014, Dolde2014, Muhonen2014, Veldhorst2014} give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based entirely on complementary metal-oxide-semiconductor (CMOS) technology, which is the basis for all modern processor chips. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin states of a single electron confined in a quantum dot, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout \cite{Colless2013}. This system, based entirely on available technology and existing components, is compatible with general surface code quantum error correction \cite{Terhal2015}, enabling large-scale universal quantum computation.