Data Detection in Large Multi-Antenna Wireless Systems via Approximate Semidefinite Relaxation

TL;DR

This paper introduces TASER, a novel approximate semidefinite relaxation algorithm for high-throughput, low-error data detection in large multi-antenna wireless systems, suitable for practical FPGA and ASIC implementations.

Contribution

The paper proposes TASER, a new low-complexity, near-ML error-rate data detection algorithm for large MU-MIMO and SIMO systems, with convergence guarantees and hardware architecture designs.

Findings

TASER achieves near-ML error-rate performance.

TASER operates with low complexity using semidefinite relaxation.

Hardware implementations demonstrate high throughput and efficiency.

Abstract

Practical data detectors for future wireless systems with hundreds of antennas at the base station must achieve high throughput and low error rate at low complexity. Since the complexity of maximum-likelihood (ML) data detection is prohibitive for such large wireless systems, approximate methods are necessary. In this paper, we propose a novel data detection algorithm referred to as Triangular Approximate SEmidefinite Relaxation (TASER), which is suitable for two application scenarios: (i) coherent data detection in large multi-user multiple-input multiple-output (MU-MIMO) wireless systems and (ii) joint channel estimation and data detection in large single-input multiple-output (SIMO) wireless systems. For both scenarios, we show that TASER achieves near-ML error-rate performance at low complexity by relaxing the associated ML-detection problems into a semidefinite program, which we solve approximately using a preconditioned forward-backward splitting procedure. Since the resulting problem is non-convex, we provide convergence guarantees for our algorithm. To demonstrate the efficacy of TASER in practice, we design a systolic architecture that enables our algorithm to achieve high throughput at low hardware complexity, and we develop reference field-programmable gate array (FPGA) and application-specific integrated circuit (ASIC) designs for various antenna configurations.